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| author | York Sun <yorksun@freescale.com> | 2013-11-18 10:29:32 -0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-11-25 11:43:46 -0800 |
| commit | 9a17eb5b7e7ba528c278a9677c38d7ae722d93ec (patch) | |
| tree | 5df092304229af616adb25b47d31a01ca0cf7d90 /board/sbc8641d | |
| parent | 5614e71b4956c579cd4419b958b33fa6316eaa92 (diff) | |
| download | u-boot-imx-9a17eb5b7e7ba528c278a9677c38d7ae722d93ec.zip u-boot-imx-9a17eb5b7e7ba528c278a9677c38d7ae722d93ec.tar.gz u-boot-imx-9a17eb5b7e7ba528c278a9677c38d7ae722d93ec.tar.bz2 | |
Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx
Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3
structure for 83xx, 85xx and 86xx.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/sbc8641d')
| -rw-r--r-- | board/sbc8641d/sbc8641d.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index 8160c7b..4906be4 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -93,7 +93,7 @@ long int fixed_sdram (void) { #if !defined(CONFIG_SYS_RAMBOOT) volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile ccsr_ddr_t *ddr = &immap->im_ddr1; + volatile struct ccsr_ddr *ddr = &immap->im_ddr1; ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS; ddr->cs1_bnds = CONFIG_SYS_DDR_CS1_BNDS; @@ -111,7 +111,7 @@ long int fixed_sdram (void) ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CFG_2; ddr->sdram_mode = CONFIG_SYS_DDR_MODE_1; ddr->sdram_mode_2 = CONFIG_SYS_DDR_MODE_2; - ddr->sdram_mode_cntl = CONFIG_SYS_DDR_MODE_CTL; + ddr->sdram_md_cntl = CONFIG_SYS_DDR_MODE_CTL; ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; ddr->sdram_data_init = CONFIG_SYS_DDR_DATA_INIT; ddr->sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CTRL; @@ -142,7 +142,7 @@ long int fixed_sdram (void) ddr->sdram_cfg_2 = CONFIG_SYS_DDR2_CFG_2; ddr->sdram_mode = CONFIG_SYS_DDR2_MODE_1; ddr->sdram_mode_2 = CONFIG_SYS_DDR2_MODE_2; - ddr->sdram_mode_cntl = CONFIG_SYS_DDR2_MODE_CTL; + ddr->sdram_md_cntl = CONFIG_SYS_DDR2_MODE_CTL; ddr->sdram_interval = CONFIG_SYS_DDR2_INTERVAL; ddr->sdram_data_init = CONFIG_SYS_DDR2_DATA_INIT; ddr->sdram_clk_cntl = CONFIG_SYS_DDR2_CLK_CTRL; |