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authorKumar Gala <galak@kernel.crashing.org>2010-12-17 10:26:44 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-01-14 01:32:21 -0600
commitc51136ec45b924a9c4f34a2e4ab16dc2606c40a5 (patch)
tree7156e4e360e4a5654b3ae51c28d150df4fbbcc03 /board/sbc8641d
parentb8526212ca1e299d8833f413b737a326bf484ee4 (diff)
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powerpc/86xx: Rework SBC8641 pci_init_board to use common FSL PCIe code
Remove duplicated code in SBC8641 board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> CC: Paul Gortmaker <paul.gortmaker@windriver.com>
Diffstat (limited to 'board/sbc8641d')
-rw-r--r--board/sbc8641d/law.c4
-rw-r--r--board/sbc8641d/sbc8641d.c63
2 files changed, 2 insertions, 65 deletions
diff --git a/board/sbc8641d/law.c b/board/sbc8641d/law.c
index 705e1c2..a6f60ee 100644
--- a/board/sbc8641d/law.c
+++ b/board/sbc8641d/law.c
@@ -49,11 +49,7 @@ struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
LAW_SIZE_256M, LAW_TRGT_IF_DDR_2),
#endif
- SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
- SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
- SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
- SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC),
SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO)
};
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index 5ee8f73..5c30b26 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -181,70 +181,11 @@ long int fixed_sdram (void)
* Initialize PCI Devices, report devices found.
*/
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_fsl86xxads_config_table[] = {
- {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}},
- {}
-};
-#endif
-
-static struct pci_controller pcie1_hose = {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc86xxcts_config_table
-#endif
-};
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_PCIE2
-static struct pci_controller pcie2_hose;
-#endif /* CONFIG_PCIE2 */
-
-int first_free_busno = 0;
-
void pci_init_board(void)
{
- struct fsl_pci_info pci_info[2];
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- uint devdisr = in_be32(&gur->devdisr);
- int pcie_ep;
- int num = 0;
-
-#ifdef CONFIG_PCIE1
- int pcie_configured = is_serdes_configured(PCIE1);
-
- if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
- SET_STD_PCIE_INFO(pci_info[num], 1);
- pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf("PCIE1: connected as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie1_hose, first_free_busno);
- } else {
- puts("PCIE1: disabled\n");
- }
-#else
- puts("PCIE1: disabled\n");
-#endif /* CONFIG_PCIE1 */
-
-#ifdef CONFIG_PCIE2
-
- SET_STD_PCIE_INFO(pci_info[num], 2);
- pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf("PCIE2: connected as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie2_hose, first_free_busno);
-#else
- puts("PCIE2: disabled\n");
-#endif /* CONFIG_PCIE2 */
+ fsl_pcie_init_board(0);
}
+#endif /* CONFIG_PCI */
#if defined(CONFIG_OF_BOARD_SETUP)