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authorKumar Gala <galak@kernel.crashing.org>2010-07-09 00:02:34 -0500
committerKumar Gala <galak@kernel.crashing.org>2010-07-20 04:37:11 -0500
commit46f3e3851dac0c4acecf4192d8e13c8521ce98b4 (patch)
tree3b9cd80f04cd5237756377d1c702ec7f87b4c6e2 /board/sbc8641d/law.c
parentdd2cda3dbd0130445e5186c6f038016474666337 (diff)
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powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641
The MPC8641 boards actually only have PCIE not PCI. Rename so we are uniform with regards to names so we can replace this code with templated code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/sbc8641d/law.c')
-rw-r--r--board/sbc8641d/law.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/board/sbc8641d/law.c b/board/sbc8641d/law.c
index d20fa51..705e1c2 100644
--- a/board/sbc8641d/law.c
+++ b/board/sbc8641d/law.c
@@ -32,11 +32,11 @@
*
* 0x0000_0000 DDR 256M
* 0x1000_0000 DDR2 256M
- * 0x8000_0000 PCI1 MEM 512M
- * 0xa000_0000 PCI2 MEM 512M
+ * 0x8000_0000 PCIE1 MEM 512M
+ * 0xa000_0000 PCIE2 MEM 512M
* 0xc000_0000 RapidIO 512M
- * 0xe200_0000 PCI1 IO 16M
- * 0xe300_0000 PCI2 IO 16M
+ * 0xe200_0000 PCIE1 IO 16M
+ * 0xe300_0000 PCIE2 IO 16M
* 0xf800_0000 CCSRBAR 2M
* 0xfe00_0000 FLASH (boot bank) 32M
*
@@ -49,11 +49,11 @@ struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
LAW_SIZE_256M, LAW_TRGT_IF_DDR_2),
#endif
- SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
- SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
+ SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
+ SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
- SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
- SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
+ SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
+ SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC),
SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO)
};