diff options
| author | Wolfgang Denk <wd@denx.de> | 2010-08-03 22:45:13 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-08-03 22:45:13 +0200 |
| commit | ac956293befb265b8958654d08c4ad52e605d46e (patch) | |
| tree | 4fbfc08b1be8616bc5ee2032b53996ac0c5d64d8 /board/sbc8641d/law.c | |
| parent | e9aecdec153ae166739858e6a570432449b979f7 (diff) | |
| parent | 7385c28e9b5f7d47e6a8f1ad9800e6e70af714e2 (diff) | |
| download | u-boot-imx-ac956293befb265b8958654d08c4ad52e605d46e.zip u-boot-imx-ac956293befb265b8958654d08c4ad52e605d46e.tar.gz u-boot-imx-ac956293befb265b8958654d08c4ad52e605d46e.tar.bz2 | |
Merge branch 'master' of /home/wd/git/u-boot/master
Diffstat (limited to 'board/sbc8641d/law.c')
| -rw-r--r-- | board/sbc8641d/law.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/board/sbc8641d/law.c b/board/sbc8641d/law.c index d20fa51..705e1c2 100644 --- a/board/sbc8641d/law.c +++ b/board/sbc8641d/law.c @@ -32,11 +32,11 @@ * * 0x0000_0000 DDR 256M * 0x1000_0000 DDR2 256M - * 0x8000_0000 PCI1 MEM 512M - * 0xa000_0000 PCI2 MEM 512M + * 0x8000_0000 PCIE1 MEM 512M + * 0xa000_0000 PCIE2 MEM 512M * 0xc000_0000 RapidIO 512M - * 0xe200_0000 PCI1 IO 16M - * 0xe300_0000 PCI2 IO 16M + * 0xe200_0000 PCIE1 IO 16M + * 0xe300_0000 PCIE2 IO 16M * 0xf800_0000 CCSRBAR 2M * 0xfe00_0000 FLASH (boot bank) 32M * @@ -49,11 +49,11 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), #endif - SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), - SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC), - SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), - SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), + SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), + SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO) }; |