mpc85xx boards: initdram() cleanup/bugfix

Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts.  Most
of the initdram() functions were identical, with 2 common differences:

1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others.  I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.

2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document.  It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled.  This seems bad.

The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.c

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 1 insertions, 92 deletions

diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c
index 7bf8179..c5fe92e 100644
--- a/board/sbc8560/sbc8560.c
+++ b/board/sbc8560/sbc8560.c
@@ -38,8 +38,6 @@
 #include <libfdt.h>
 #include <fdt_support.h>
 
-long int fixed_sdram (void);
-
 /*
  * I/O Port configuration table
  *
@@ -263,95 +261,6 @@ int checkboard (void)
 }
 
 
-phys_size_t initdram (int board_type)
-{
-	long dram_size = 0;
-
-#if 0
-#if !defined(CONFIG_RAM_AS_FLASH)
-	volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
-	sys_info_t sysinfo;
-	uint temp_lbcdll = 0;
-#endif
-#endif /* 0 */
-#if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL)
-	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-#endif
-#if defined(CONFIG_DDR_DLL)
-	uint temp_ddrdll = 0;
-
-	/* Work around to stabilize DDR DLL */
-	temp_ddrdll = gur->ddrdllcr;
-	gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
-	asm("sync;isync;msync");
-#endif
-
-#if defined(CONFIG_SPD_EEPROM)
-	dram_size = fsl_ddr_sdram();
-	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
-	dram_size *= 0x100000;
-#else
-	dram_size = fixed_sdram ();
-#endif
-
-#if 0
-#if !defined(CONFIG_RAM_AS_FLASH) /* LocalBus SDRAM is not emulating flash */
-	get_sys_info(&sysinfo);
-	/* if localbus freq is less than 66MHz,we use bypass mode,otherwise use DLL */
-	if(sysinfo.freqSystemBus/(CONFIG_SYS_LBC_LCRR & 0x0f) < 66000000) {
-		lbc->lcrr = (CONFIG_SYS_LBC_LCRR & 0x0fffffff)| 0x80000000;
-	} else {
-#if defined(CONFIG_MPC85xx_REV1) /* need change CLKDIV before enable DLL */
-		lbc->lcrr = 0x10000004; /* default CLKDIV is 8, change it to 4 temporarily */
-#endif
-		lbc->lcrr = CONFIG_SYS_LBC_LCRR & 0x7fffffff;
-		udelay(200);
-		temp_lbcdll = gur->lbcdllcr;
-		gur->lbcdllcr = ((temp_lbcdll & 0xff) << 16 ) | 0x80000000;
-		asm("sync;isync;msync");
-	}
-	set_lbc_or(2, CONFIG_SYS_OR2_PRELIM); /* 64MB SDRAM */
-	set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
-	lbc->lbcr = CONFIG_SYS_LBC_LBCR;
-	lbc->lsdmr = CONFIG_SYS_LBC_LSDMR_1;
-	asm("sync");
-	(unsigned int) * (ulong *)0 = 0x000000ff;
-	lbc->lsdmr = CONFIG_SYS_LBC_LSDMR_2;
-	asm("sync");
-	(unsigned int) * (ulong *)0 = 0x000000ff;
-	lbc->lsdmr = CONFIG_SYS_LBC_LSDMR_3;
-	asm("sync");
-	(unsigned int) * (ulong *)0 = 0x000000ff;
-	lbc->lsdmr = CONFIG_SYS_LBC_LSDMR_4;
-	asm("sync");
-	(unsigned int) * (ulong *)0 = 0x000000ff;
-	lbc->lsdmr = CONFIG_SYS_LBC_LSDMR_5;
-	asm("sync");
-	lbc->lsrt = CONFIG_SYS_LBC_LSRT;
-	asm("sync");
-	lbc->mrtpr = CONFIG_SYS_LBC_MRTPR;
-	asm("sync");
-#endif
-#endif
-
-#if defined(CONFIG_DDR_ECC)
-	{
-		/* Initialize all of memory for ECC, then
-		 * enable errors */
-		volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
-
-		dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size);
-
-		/* Enable errors for ECC */
-		ddr->err_disable = 0x00000000;
-		asm("sync;isync;msync");
-	}
-#endif
-
-	return dram_size;
-}
-
-
 #if defined(CONFIG_SYS_DRAM_TEST)
 int testdram (void)
 {
@@ -390,7 +299,7 @@ int testdram (void)
 /*************************************************************************
  *  fixed sdram init -- doesn't use serial presence detect.
  ************************************************************************/
-long int fixed_sdram (void)
+phys_size_t fixed_sdram(void)
 {
 
 #define CONFIG_SYS_DDR_CONTROL 0xc2000000