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authorPaul Gortmaker <paul.gortmaker@windriver.com>2008-07-11 15:33:04 -0400
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-07-14 19:35:03 -0500
commit0ec436d2f95076d9e46ae594db6e9b1d8732840d (patch)
treee62f6c7c826451fc4c8a42e9a4f6cfd72a17a8dc /board/sbc8560
parent6de5bf24004c8d9c9b070bb8f7418d1c45e5eb27 (diff)
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sbc8560: properly set cs0_bnds for 512MB
The sbc8560 board ships with 512MB of memory installed, but the current cs0_bnds is hard coded for 256MB. Set the value based on CFG_SDRAM_SIZE. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Diffstat (limited to 'board/sbc8560')
-rw-r--r--board/sbc8560/sbc8560.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c
index 2946ca1..3b6b541 100644
--- a/board/sbc8560/sbc8560.c
+++ b/board/sbc8560/sbc8560.c
@@ -421,7 +421,11 @@ long int fixed_sdram (void)
#ifndef CFG_RAMBOOT
volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
+#if (CFG_SDRAM_SIZE == 512)
+ ddr->cs0_bnds = 0x0000000f;
+#else
ddr->cs0_bnds = 0x00000007;
+#endif
ddr->cs1_bnds = 0x0010001f;
ddr->cs2_bnds = 0x00000000;
ddr->cs3_bnds = 0x00000000;