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author | Jon Loeliger <jdl@freescale.com> | 2008-01-03 09:46:55 -0600 |
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committer | Jon Loeliger <jdl@freescale.com> | 2008-01-03 09:46:55 -0600 |
commit | 2c3536425d987bf079258973e2acebaaef3e16b6 (patch) | |
tree | 659d06dd33eca4888e1f6d01d046507b76dc2d27 /board/sbc8560/sbc8560.c | |
parent | f743931f9b4d4e15c9bdfe726bef033ea1f1402c (diff) | |
parent | ce37422d0002e10490e268392e0c4e3028e52cec (diff) | |
download | u-boot-imx-2c3536425d987bf079258973e2acebaaef3e16b6.zip u-boot-imx-2c3536425d987bf079258973e2acebaaef3e16b6.tar.gz u-boot-imx-2c3536425d987bf079258973e2acebaaef3e16b6.tar.bz2 |
Merge commit 'wd/master'
Diffstat (limited to 'board/sbc8560/sbc8560.c')
-rw-r--r-- | board/sbc8560/sbc8560.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c index e8b9929..47df884 100644 --- a/board/sbc8560/sbc8560.c +++ b/board/sbc8560/sbc8560.c @@ -195,8 +195,7 @@ const iop_conf_t iop_conf_tab[4][32] = { int board_early_init_f (void) { #if defined(CONFIG_PCI) - volatile immap_t *immr = (immap_t *)CFG_IMMR; - volatile ccsr_pcix_t *pci = &immr->im_pcix; + volatile ccsr_pcix_t *pci = (void *)(CFG_MPC85xx_PCIX_ADDR); pci->peer &= 0xfffffffdf; /* disable master abort */ #endif @@ -264,16 +263,15 @@ long int initdram (int board_type) { long dram_size = 0; extern long spd_sdram (void); - volatile immap_t *immap = (immap_t *)CFG_IMMR; #if 0 #if !defined(CONFIG_RAM_AS_FLASH) - volatile ccsr_lbc_t *lbc= &immap->im_lbc; + volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); sys_info_t sysinfo; uint temp_lbcdll = 0; #endif #endif /* 0 */ #if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL) - volatile ccsr_gur_t *gur= &immap->im_gur; + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); #endif #if defined(CONFIG_DDR_DLL) uint temp_ddrdll = 0; @@ -336,8 +334,7 @@ long int initdram (int board_type) * enable errors */ uint *p = 0; uint i = 0; - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_ddr_t *ddr= &immap->im_ddr; + volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR); dma_init(); for (*p = 0; p < (uint *)(8 * 1024); p++) { if (((unsigned int)p & 0x1f) == 0) { dcbz(p); } @@ -424,8 +421,7 @@ long int fixed_sdram (void) #define CFG_DDR_CONTROL 0xc2000000 #ifndef CFG_RAMBOOT - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_ddr_t *ddr= &immap->im_ddr; + volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR); ddr->cs0_bnds = 0x00000007; ddr->cs1_bnds = 0x0010001f; |