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| author | Kumar Gala <galak@kernel.crashing.org> | 2008-01-16 09:05:27 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-01-16 23:21:55 -0600 |
| commit | e2b159d0070ee06e4ac7e2f9381d3e8e542e614a (patch) | |
| tree | d6b4078592b724ed2d85792aef6596f4a75f9857 /board/sbc8548/init.S | |
| parent | 2cfaa1aa1aac39a81006b7b27e0e431bf21f6dfa (diff) | |
| download | u-boot-imx-e2b159d0070ee06e4ac7e2f9381d3e8e542e614a.zip u-boot-imx-e2b159d0070ee06e4ac7e2f9381d3e8e542e614a.tar.gz u-boot-imx-e2b159d0070ee06e4ac7e2f9381d3e8e542e614a.tar.bz2 | |
85xx: convert SBC8540/SBC8560/SBC8548 over to use new LAW init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/sbc8548/init.S')
| -rw-r--r-- | board/sbc8548/init.S | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/board/sbc8548/init.S b/board/sbc8548/init.S index cafa214..6696dd9 100644 --- a/board/sbc8548/init.S +++ b/board/sbc8548/init.S @@ -191,51 +191,3 @@ tlb1_entry: .long FSL_BOOKE_MAS3(CFG_EPLD_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR)) entry_end - -/* - * LAW(Local Access Window) configuration: - * - * 0x0000_0000 0x0fff_ffff DDR 256M - * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M - * 0xe000_0000 0xe000_ffff CCSR 1M - * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M - * 0xf000_0000 0xf7ff_ffff SDRAM 128M - * 0xf8b0_0000 0xf80f_ffff EEPROM 1M - * 0xfb80_0000 0xff7f_ffff FLASH (2nd bank) 64M - * 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M - * - * Notes: - * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. - * If flash is 8M at default position (last 8M), no LAW needed. - * - * The defines below are 1-off of the actual LAWAR0 usage. - * So LAWAR3 define uses the LAWAR4 register in the ECM. - */ - - -#if !defined(CONFIG_SPD_EEPROM) - #define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff) - #define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_256M)) -#else - #define LAWBAR0 0 - #define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_256M)) & ~LAWAR_EN) -#endif - -#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff) -#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M)) - -#define LAWBAR2 ((CFG_PCI1_IO_BASE>>12) & 0xfffff) -#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)) - -/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ -#define LAWBAR3 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff) -#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M)) - - .section .bootpg, "ax" - .globl law_entry - -law_entry: - entry_start - .long 4 - .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3 - entry_end |