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| author | Ilya Yanok <yanok@emcraft.com> | 2010-09-17 23:41:49 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-09-23 21:14:08 +0200 |
| commit | 65ea758939a7bcbc87fe1c1bd816a98176bc2a9b (patch) | |
| tree | 13048971c089c4ed70f7012cbbec1f6d7e4c2f10 /board/sbc8349 | |
| parent | f3ce250d96588d96bd4148883455e00ea14adca5 (diff) | |
| download | u-boot-imx-65ea758939a7bcbc87fe1c1bd816a98176bc2a9b.zip u-boot-imx-65ea758939a7bcbc87fe1c1bd816a98176bc2a9b.tar.gz u-boot-imx-65ea758939a7bcbc87fe1c1bd816a98176bc2a9b.tar.bz2 | |
MPC8308RDB: various clean ups
This patch cleans up the Freescale MPC8308RDB Development board support.
Things fixed:
- Removed unused PCIE2 definitions from configuration
- SICR{L,H} defines used for System I/O Configuration Registers values
instead of hardcoding
- CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of
writing to SCCR from the board code
- sleep mode stuff removed as MPC8308 has no support for deep sleep and
PMCCR1 register. board_early_init_f() removed.
- MPC8308 has no ERRATA for DDR controller so workaround removed
- 'assignment in if statement' issues solved
- use LBLAWAR_* defines instead of hardcoding
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/sbc8349')
0 files changed, 0 insertions, 0 deletions