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author | Stefan Roese <sr@denx.de> | 2014-11-13 03:43:39 +0100 |
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committer | Tom Rini <trini@ti.com> | 2014-12-04 21:28:31 -0500 |
commit | fb384c4720ca7496775d6578f184bf628db73456 (patch) | |
tree | 21e59033d0d2756df6ec75cbfa3963cd0b6c0025 /board/sbc8349 | |
parent | e49631afa074e2cb8ea5baddbbe8b9483a491e32 (diff) | |
download | u-boot-imx-fb384c4720ca7496775d6578f184bf628db73456.zip u-boot-imx-fb384c4720ca7496775d6578f184bf628db73456.tar.gz u-boot-imx-fb384c4720ca7496775d6578f184bf628db73456.tar.bz2 |
mtd: nand: omap_gpmc: Always use ready/busy pin
The functions to detect the state of the ready / busy signal is already
available but only used in the SPL case. Lets use it always, also for the
main U-Boot. As all boards should have this HW connection.
Testing on Siemens Draco (am335x) showed a small perfomance gain by using
this ready pin to detect the NAND chip state. Here the values tested on
Draco with Hynix 4GBit NAND:
Without NAND ready pin:
U-Boot# time nand read 80400000 0 400000
NAND read: device 0 offset 0x0, size 0x400000
4194304 bytes read: OK
time: 2.947 seconds, 2947 ticks
With NAND ready pin:
U-Boot# time nand read 80400000 0 400000
NAND read: device 0 offset 0x0, size 0x400000
4194304 bytes read: OK
time: 2.795 seconds, 2795 ticks
So an increase of approx. 5%.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Samuel Egli <samuel.egli@siemens.com>
Diffstat (limited to 'board/sbc8349')
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