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author | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
commit | f61f1e150c84f5b9347fca79a4bc5f2286c545d2 (patch) | |
tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/sandburst/metrobox/init.S | |
parent | ec081c2c190148b374e86a795fb6b1c49caeb549 (diff) | |
parent | f82642e33899766892499b163e60560fbbf87773 (diff) | |
download | u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.zip u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.tar.gz u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.tar.bz2 |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/sandburst/metrobox/init.S')
-rw-r--r-- | board/sandburst/metrobox/init.S | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/board/sandburst/metrobox/init.S b/board/sandburst/metrobox/init.S index e398f00..ccdec46 100644 --- a/board/sandburst/metrobox/init.S +++ b/board/sandburst/metrobox/init.S @@ -88,12 +88,12 @@ tlbtab: tlbtab_start tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry( CFG_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CFG_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CFG_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) + tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) tlbtab_end |