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| author | Przemyslaw Marczak <p.marczak@samsung.com> | 2014-10-28 17:31:07 +0100 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2014-10-30 19:56:16 +0900 |
| commit | 4aa97312f7147b68b8b7c731d7bb01cff8dda2d6 (patch) | |
| tree | 6360d7b2ea11fed4b3a39b338b8bc8d62ab1ebd0 /board/samsung | |
| parent | 9e306f15c60570ebed1029e0d0690eea53fb6019 (diff) | |
| download | u-boot-imx-4aa97312f7147b68b8b7c731d7bb01cff8dda2d6.zip u-boot-imx-4aa97312f7147b68b8b7c731d7bb01cff8dda2d6.tar.gz u-boot-imx-4aa97312f7147b68b8b7c731d7bb01cff8dda2d6.tar.bz2 | |
odroid: adjust gpio calls to dm gpio api
Setting gpio value before dm gpio init has no effect,
so now, odroid gpio settings are moved after the gpio uclass init.
Using non-requested gpio pin cases printing error messages.
To avoid this, gpio_request() is added for those gpios.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'board/samsung')
| -rw-r--r-- | board/samsung/odroid/odroid.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index 5edb250..33003ee 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -356,21 +356,29 @@ static void board_clock_init(void) static void board_gpio_init(void) { /* eMMC Reset Pin */ + gpio_request(EXYNOS4X12_GPIO_K12, "eMMC Reset"); + gpio_cfg_pin(EXYNOS4X12_GPIO_K12, S5P_GPIO_FUNC(0x1)); gpio_set_pull(EXYNOS4X12_GPIO_K12, S5P_GPIO_PULL_NONE); gpio_set_drv(EXYNOS4X12_GPIO_K12, S5P_GPIO_DRV_4X); /* Enable FAN (Odroid U3) */ + gpio_request(EXYNOS4X12_GPIO_D00, "FAN Control"); + gpio_set_pull(EXYNOS4X12_GPIO_D00, S5P_GPIO_PULL_UP); gpio_set_drv(EXYNOS4X12_GPIO_D00, S5P_GPIO_DRV_4X); gpio_direction_output(EXYNOS4X12_GPIO_D00, 1); /* OTG Vbus output (Odroid U3+) */ + gpio_request(EXYNOS4X12_GPIO_L20, "OTG Vbus"); + gpio_set_pull(EXYNOS4X12_GPIO_L20, S5P_GPIO_PULL_NONE); gpio_set_drv(EXYNOS4X12_GPIO_L20, S5P_GPIO_DRV_4X); gpio_direction_output(EXYNOS4X12_GPIO_L20, 0); /* OTG INT (Odroid U3+) */ + gpio_request(EXYNOS4X12_GPIO_X31, "OTG INT"); + gpio_set_pull(EXYNOS4X12_GPIO_X31, S5P_GPIO_PULL_UP); gpio_set_drv(EXYNOS4X12_GPIO_X31, S5P_GPIO_DRV_4X); gpio_direction_input(EXYNOS4X12_GPIO_X31); @@ -403,7 +411,6 @@ static void board_init_i2c(void) int exynos_early_init_f(void) { board_clock_init(); - board_gpio_init(); return 0; } @@ -414,6 +421,8 @@ int exynos_init(void) gd->ram_size -= SZ_1M; gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= SZ_1M; + board_gpio_init(); + return 0; } |