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| author | Simon Glass <sjg@chromium.org> | 2014-10-20 19:48:39 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-10-22 10:36:33 -0600 |
| commit | 7f1961018cb494c029fcbb446e6562064735ec5e (patch) | |
| tree | 10089a45751339df4ed17fd12ed1838ed60c0ca5 /board/samsung/trats/trats.c | |
| parent | 3a233dbfe9308943122cc2473064bb7e876577f0 (diff) | |
| download | u-boot-imx-7f1961018cb494c029fcbb446e6562064735ec5e.zip u-boot-imx-7f1961018cb494c029fcbb446e6562064735ec5e.tar.gz u-boot-imx-7f1961018cb494c029fcbb446e6562064735ec5e.tar.bz2 | |
dm: exynos: Make sure that GPIOs are requested
With driver model GPIOs must be requested before use. Make sure this is
done correctly.
(Note that the soft SPI part of universal is omitted, since this driver
is about to be replaced with a driver-model-aware version)
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/samsung/trats/trats.c')
| -rw-r--r-- | board/samsung/trats/trats.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 9e76b5d..e163e45 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -63,6 +63,8 @@ void i2c_init_board(void) } /* I2C_8 -> FG */ + gpio_request(EXYNOS4_GPIO_Y40, "i2c_clk"); + gpio_request(EXYNOS4_GPIO_Y41, "i2c_data"); gpio_direction_output(EXYNOS4_GPIO_Y40, 1); gpio_direction_output(EXYNOS4_GPIO_Y41, 1); } @@ -346,12 +348,17 @@ int exynos_power_init(void) static unsigned int get_hw_revision(void) { int hwrev = 0; + char str[10]; int i; /* hw_rev[3:0] == GPE1[3:0] */ - for (i = EXYNOS4_GPIO_E10; i < EXYNOS4_GPIO_E14; i++) { - gpio_cfg_pin(i, S5P_GPIO_INPUT); - gpio_set_pull(i, S5P_GPIO_PULL_NONE); + for (i = 0; i < 4; i++) { + int pin = i + EXYNOS4_GPIO_E10; + + sprintf(str, "hw_rev%d", i); + gpio_request(pin, str); + gpio_cfg_pin(pin, S5P_GPIO_INPUT); + gpio_set_pull(pin, S5P_GPIO_PULL_NONE); } udelay(1); @@ -517,6 +524,7 @@ static void board_power_init(void) static void exynos_uart_init(void) { /* UART_SEL GPY4[7] (part2) at EXYNOS4 */ + gpio_request(EXYNOS4_GPIO_Y47, "uart_sel"); gpio_set_pull(EXYNOS4_GPIO_Y47, S5P_GPIO_PULL_UP); gpio_direction_output(EXYNOS4_GPIO_Y47, 1); } @@ -534,6 +542,7 @@ int exynos_early_init_f(void) void exynos_reset_lcd(void) { + gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset"); gpio_direction_output(EXYNOS4_GPIO_Y45, 1); udelay(10000); gpio_direction_output(EXYNOS4_GPIO_Y45, 0); |