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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-03-26 09:51:09 +0100
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-03-26 09:51:09 +0100
commit412665b46134f93464c09405e02f08ac9c62526d (patch)
tree7d45bfd311e81d2d750c0c67edef17ceba17df3f /board/samsung/smdk5250
parentb6379e15a70cc2e22486e5962927d9de374d877b (diff)
parentce0c1bc13556fbf1bdfa2a4a27ca6744e7beb32a (diff)
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Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Diffstat (limited to 'board/samsung/smdk5250')
-rw-r--r--board/samsung/smdk5250/smdk5250.c178
1 files changed, 175 insertions, 3 deletions
diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
index 7a5f132..217c6df 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -23,6 +23,7 @@
#include <common.h>
#include <fdtdec.h>
#include <asm/io.h>
+#include <errno.h>
#include <i2c.h>
#include <lcd.h>
#include <netdev.h>
@@ -35,9 +36,40 @@
#include <asm/arch/sromc.h>
#include <asm/arch/dp_info.h>
#include <power/pmic.h>
+#include <power/max77686_pmic.h>
+#include <tmu.h>
DECLARE_GLOBAL_DATA_PTR;
+#if defined CONFIG_EXYNOS_TMU
+/*
+ * Boot Time Thermal Analysis for SoC temperature threshold breach
+ */
+static void boot_temp_check(void)
+{
+ int temp;
+
+ switch (tmu_monitor(&temp)) {
+ /* Status TRIPPED ans WARNING means corresponding threshold breach */
+ case TMU_STATUS_TRIPPED:
+ puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
+ set_ps_hold_ctrl();
+ hang();
+ break;
+ case TMU_STATUS_WARNING:
+ puts("EXYNOS_TMU: WARNING! Temperature very high\n");
+ break;
+ /*
+ * TMU_STATUS_INIT means something is wrong with temperature sensing
+ * and TMU status was changed back from NORMAL to INIT.
+ */
+ case TMU_STATUS_INIT:
+ default:
+ debug("EXYNOS_TMU: Unknown TMU state\n");
+ }
+}
+#endif
+
#ifdef CONFIG_USB_EHCI_EXYNOS
int board_usb_vbus_init(void)
{
@@ -54,15 +86,39 @@ int board_usb_vbus_init(void)
}
#endif
+#ifdef CONFIG_SOUND_MAX98095
+static void board_enable_audio_codec(void)
+{
+ struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
+ samsung_get_base_gpio_part1();
+
+ /* Enable MAX98095 Codec */
+ s5p_gpio_direction_output(&gpio1->x1, 7, 1);
+ s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE);
+}
+#endif
+
int board_init(void)
{
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+
+#if defined CONFIG_EXYNOS_TMU
+ if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
+ debug("%s: Failed to init TMU\n", __func__);
+ return -1;
+ }
+ boot_temp_check();
+#endif
+
#ifdef CONFIG_EXYNOS_SPI
spi_init();
#endif
#ifdef CONFIG_USB_EHCI_EXYNOS
board_usb_vbus_init();
#endif
+#ifdef CONFIG_SOUND_MAX98095
+ board_enable_audio_codec();
+#endif
return 0;
}
@@ -80,12 +136,119 @@ int dram_init(void)
}
#if defined(CONFIG_POWER)
+static int pmic_reg_update(struct pmic *p, int reg, uint regval)
+{
+ u32 val;
+ int ret = 0;
+
+ ret = pmic_reg_read(p, reg, &val);
+ if (ret) {
+ debug("%s: PMIC %d register read failed\n", __func__, reg);
+ return -1;
+ }
+ val |= regval;
+ ret = pmic_reg_write(p, reg, val);
+ if (ret) {
+ debug("%s: PMIC %d register write failed\n", __func__, reg);
+ return -1;
+ }
+ return 0;
+}
+
int power_init_board(void)
{
+ struct pmic *p;
+
+ set_ps_hold_ctrl();
+
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
if (pmic_init(I2C_PMIC))
return -1;
- else
- return 0;
+
+ p = pmic_get("MAX77686_PMIC");
+ if (!p)
+ return -ENODEV;
+
+ if (pmic_probe(p))
+ return -1;
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
+ return -1;
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
+ MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
+ return -1;
+
+ /* VDD_MIF */
+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
+ MAX77686_BUCK1OUT_1V)) {
+ debug("%s: PMIC %d register write failed\n", __func__,
+ MAX77686_REG_PMIC_BUCK1OUT);
+ return -1;
+ }
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
+ MAX77686_BUCK1CTRL_EN))
+ return -1;
+
+ /* VDD_ARM */
+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
+ MAX77686_BUCK2DVS1_1_3V)) {
+ debug("%s: PMIC %d register write failed\n", __func__,
+ MAX77686_REG_PMIC_BUCK2DVS1);
+ return -1;
+ }
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
+ MAX77686_BUCK2CTRL_ON))
+ return -1;
+
+ /* VDD_INT */
+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
+ MAX77686_BUCK3DVS1_1_0125V)) {
+ debug("%s: PMIC %d register write failed\n", __func__,
+ MAX77686_REG_PMIC_BUCK3DVS1);
+ return -1;
+ }
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
+ MAX77686_BUCK3CTRL_ON))
+ return -1;
+
+ /* VDD_G3D */
+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
+ MAX77686_BUCK4DVS1_1_2V)) {
+ debug("%s: PMIC %d register write failed\n", __func__,
+ MAX77686_REG_PMIC_BUCK4DVS1);
+ return -1;
+ }
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
+ MAX77686_BUCK3CTRL_ON))
+ return -1;
+
+ /* VDD_LDO2 */
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
+ MAX77686_LD02CTRL1_1_5V | EN_LDO))
+ return -1;
+
+ /* VDD_LDO3 */
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
+ MAX77686_LD03CTRL1_1_8V | EN_LDO))
+ return -1;
+
+ /* VDD_LDO5 */
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
+ MAX77686_LD05CTRL1_1_8V | EN_LDO))
+ return -1;
+
+ /* VDD_LDO10 */
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
+ MAX77686_LD10CTRL1_1_8V | EN_LDO))
+ return -1;
+
+ return 0;
}
#endif
@@ -212,8 +375,17 @@ int board_eth_init(bd_t *bis)
#ifdef CONFIG_DISPLAY_BOARDINFO
int checkboard(void)
{
- printf("\nBoard: SMDK5250\n");
+#ifdef CONFIG_OF_CONTROL
+ const char *board_name;
+ board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
+ if (board_name == NULL)
+ printf("\nUnknown Board\n");
+ else
+ printf("\nBoard: %s\n", board_name);
+#else
+ printf("\nBoard: SMDK5250\n");
+#endif
return 0;
}
#endif