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| author | Doug Anderson <dianders@chromium.org> | 2012-02-13 07:38:05 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-03-27 22:08:28 +0200 |
| commit | 813fcb8a7ed53933613b38ed6db93f6319c01927 (patch) | |
| tree | e12105531cb8eec7fea5ebf4c1d163c5ce7e0d47 /board/samsung/smdk5250 | |
| parent | d0b3b49615e23d0681a6e883cda7d4bc4f728646 (diff) | |
| download | u-boot-imx-813fcb8a7ed53933613b38ed6db93f6319c01927.zip u-boot-imx-813fcb8a7ed53933613b38ed6db93f6319c01927.tar.gz u-boot-imx-813fcb8a7ed53933613b38ed6db93f6319c01927.tar.bz2 | |
EXYNOS: SMDK5250: Support all 4 UARTs
This properly configures the mux to enable all UARTs.
This also fixes things so that we don't configure balls XUCTSN_1 and
XURTSN_1 as UART1 configuration (RTS/CTS), since they aren't
connected.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Chander kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'board/samsung/smdk5250')
| -rw-r--r-- | board/samsung/smdk5250/smdk5250.c | 44 |
1 files changed, 42 insertions, 2 deletions
diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 928c08f..32786e2 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -224,11 +224,51 @@ static void board_uart_init(void) (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); int i; - /* UART1 GPIOs (part1) : GPA0CON[7:4] 0x2222 */ - for (i = 4; i < 8; i++) { + /* + * UART0 GPIOs : GPA0CON[3:0] 0x2222 + * Must set CFG17 switches to select UART0 to use. + */ + for (i = 0; i <= 3; i++) { s5p_gpio_set_pull(&gpio1->a0, i, GPIO_PULL_NONE); s5p_gpio_cfg_pin(&gpio1->a0, i, GPIO_FUNC(0x2)); } + + /* + * UART1 GPIOs : GPA0CON[5:4] 0x22 + * Must set CFG17 switches to select UART1 to use. + * + * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down + * in order to use them (so that those pins can be used for I2C). + */ + for (i = 4; i <= 5; i++) { + s5p_gpio_set_pull(&gpio1->a0, i, GPIO_PULL_NONE); + s5p_gpio_cfg_pin(&gpio1->a0, i, GPIO_FUNC(0x2)); + } + + /* + * UART2 GPIOs : GPA1CON[1:0] 0x22 + * Must set CFG17 switches to select UART2 to use. + * + * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down + * in order to use them (so that those pins can be used for I2C). + */ + for (i = 0; i <= 1; i++) { + s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE); + s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC(0x2)); + } + + /* + * UART3 GPIOs : GPA1CON[5:4] 0x22 + * Must set CFG16 switches to select UART3 to use. + */ + for (i = 4; i <= 5; i++) { + s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE); + s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC(0x2)); + } + + /* + * There's no mux for UART4--it's internal only + */ } #ifdef CONFIG_BOARD_EARLY_INIT_F |