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| author | Tom Rini <trini@ti.com> | 2013-06-22 07:38:12 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-06-22 07:38:12 -0400 |
| commit | 348e47f766ac228fb02d1af562b2e9a4c69355db (patch) | |
| tree | 778ffb90bb670f45fa7a0dae78010c8128c4d84d /board/samsung/origen/lowlevel_init.S | |
| parent | 5707233880090f785c33df32c04549ea1aeef61e (diff) | |
| parent | fbf87b1823dd5ebc2a384711ea2c677543019ece (diff) | |
| download | u-boot-imx-348e47f766ac228fb02d1af562b2e9a4c69355db.zip u-boot-imx-348e47f766ac228fb02d1af562b2e9a4c69355db.tar.gz u-boot-imx-348e47f766ac228fb02d1af562b2e9a4c69355db.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'board/samsung/origen/lowlevel_init.S')
| -rw-r--r-- | board/samsung/origen/lowlevel_init.S | 44 |
1 files changed, 2 insertions, 42 deletions
diff --git a/board/samsung/origen/lowlevel_init.S b/board/samsung/origen/lowlevel_init.S index 9daa0da..be9d418 100644 --- a/board/samsung/origen/lowlevel_init.S +++ b/board/samsung/origen/lowlevel_init.S @@ -87,12 +87,14 @@ lowlevel_init: 1: /* for UART */ bl uart_asm_init + bl arch_cpu_init bl tzpc_init pop {pc} wakeup_reset: bl system_clock_init bl mem_ctrl_asm_init + bl arch_cpu_init bl tzpc_init exit_wakeup: @@ -353,45 +355,3 @@ uart_asm_init: nop nop -/* Setting TZPC[TrustZone Protection Controller] */ -tzpc_init: - ldr r0, =TZPC0_BASE - mov r1, #R0SIZE - str r1, [r0] - mov r1, #DECPROTXSET - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =TZPC1_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =TZPC2_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =TZPC3_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =TZPC4_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =TZPC5_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - mov pc, lr |