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authorAkshay Saraswat <akshay.s@samsung.com>2014-05-13 10:30:14 +0530
committerMinkyu Kang <mk7.kang@samsung.com>2014-05-13 15:20:38 +0900
commitf6ae1ca05839f92b103aaa0743d1d0012ba9773d (patch)
tree808b8a627cffc6cff4679bd1d2e94391e41ad588 /board/samsung/arndale/arndale.c
parentbfbc47cc9fcbdb67067c20164aece775c2e2603b (diff)
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S5P: Exynos: Add GPIO pin numbering and rename definitions
This patch includes following changes : * Adds gpio pin numbering support for EXYNOS SOCs. To have consistent 0..n-1 GPIO numbering the banks are divided into different parts where ever they have holes in them. * Rename GPIO definitions from GPIO_... to S5P_GPIO_... These changes were done to enable cmd_gpio for EXYNOS and cmd_gpio has GPIO_INPUT same as s5p_gpio driver and hence getting a error during compilation. * Adds support for name to gpio conversion in s5p_gpio to enable gpio command EXYNOS SoCs. Function has been added to asm/gpio.h to decode the input gpio name to gpio number. Example: SMDK5420 # gpio set gpa00 Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'board/samsung/arndale/arndale.c')
-rw-r--r--board/samsung/arndale/arndale.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 9efc355..ef88314 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -16,17 +16,14 @@ DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_USB_EHCI_EXYNOS
int board_usb_init(int index, enum usb_init_type init)
{
- struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *)
- samsung_get_base_gpio_part1();
-
/* Configure gpios for usb 3503 hub:
* disconnect, toggle reset and connect
*/
- s5p_gpio_direction_output(&gpio->d1, 7, 0);
- s5p_gpio_direction_output(&gpio->x3, 5, 0);
+ gpio_direction_output(EXYNOS5_GPIO_D17, 0);
+ gpio_direction_output(EXYNOS5_GPIO_X35, 0);
- s5p_gpio_direction_output(&gpio->x3, 5, 1);
- s5p_gpio_direction_output(&gpio->d1, 7, 1);
+ gpio_direction_output(EXYNOS5_GPIO_X35, 1);
+ gpio_direction_output(EXYNOS5_GPIO_D17, 1);
return 0;
}