summaryrefslogtreecommitdiff
path: root/board/sacsng/clkinit.h
diff options
context:
space:
mode:
authorwdenk <wdenk>2003-06-27 21:31:46 +0000
committerwdenk <wdenk>2003-06-27 21:31:46 +0000
commit8bde7f776c77b343aca29b8c7b58464d915ac245 (patch)
tree20f1fd99975215e7c658454a15cdb4ed4694e2d4 /board/sacsng/clkinit.h
parent993cad9364c6b87ae429d1ed1130d8153f6f027e (diff)
downloadu-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.zip
u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.tar.gz
u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.tar.bz2
* Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
Diffstat (limited to 'board/sacsng/clkinit.h')
-rw-r--r--board/sacsng/clkinit.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/board/sacsng/clkinit.h b/board/sacsng/clkinit.h
index 2731f2e..011638f 100644
--- a/board/sacsng/clkinit.h
+++ b/board/sacsng/clkinit.h
@@ -50,16 +50,16 @@
#define MCLK_DIVISOR 4 /* SCLK = MCLK / MCLK_DIVISOR */
#define SCLK_DIVISOR (Daq64xSampling ? 64 : 128)
- /* LRCLK = SCLK / SCLK_DIVISOR */
+ /* LRCLK = SCLK / SCLK_DIVISOR */
#define TIGHTEN_UP_BRG_EN_TIMING /* Tighten up the BRG enable timing */
#define RUN_SCLK_ON_BRG_INT /* Run SCLK on BRG_INT instead of MCLK */
- /* The 8260 (Mask B.3) seems to have */
- /* problems generating SCLK from MCLK */
+ /* The 8260 (Mask B.3) seems to have */
+ /* problems generating SCLK from MCLK */
/* via CLK9. */
#define RUN_LRCLK_ON_BRG_INT /* Run LRCLK on BRG_INT instead of SCLK */
- /* The 8260 (Mask B.3) seems to have */
- /* problems generating LRCLK from SCLK */
+ /* The 8260 (Mask B.3) seems to have */
+ /* problems generating LRCLK from SCLK */
#define NUM_LRCLKS_TO_STABILIZE 1 /* Number of LRCLK period (sample) */
/* to wait for the clock to stabilize */
@@ -67,9 +67,9 @@
#define CPM_CLK (gd->bd->bi_cpmfreq)
#define DFBRG 4
#define BRG_INT_CLK (CPM_CLK * 2 / DFBRG)
- /* BRG = CPM * 2 / DFBRG (Sect 9.8) */
- /* BRG = CPM * 2 / 4 */
- /* BRG = CPM / 2 */
+ /* BRG = CPM * 2 / DFBRG (Sect 9.8) */
+ /* BRG = CPM * 2 / 4 */
+ /* BRG = CPM / 2 */
#define CPM_BRG_EXTC_MASK ((uint)0x0000C000)
#define CPM_BRG_EXTC_SHIFT 14