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| author | Wolfgang Denk <wd@denx.de> | 2009-07-07 22:22:05 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-07-07 22:22:05 +0200 |
| commit | a48ecc969f8d2d0fe9167962e9b8b4cca52de10b (patch) | |
| tree | 604e04770713cb314cb6184e26eeb4319dec3d43 /board/ronetix/pm9263/pm9263.c | |
| parent | bec9cab9291bb221714d559a44fe37669a8ca604 (diff) | |
| parent | ceb70b466e75ceb1a621b6163f7e31116bfc8094 (diff) | |
| download | u-boot-imx-a48ecc969f8d2d0fe9167962e9b8b4cca52de10b.zip u-boot-imx-a48ecc969f8d2d0fe9167962e9b8b4cca52de10b.tar.gz u-boot-imx-a48ecc969f8d2d0fe9167962e9b8b4cca52de10b.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
drivers/spi/Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/ronetix/pm9263/pm9263.c')
| -rw-r--r-- | board/ronetix/pm9263/pm9263.c | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index d2598a0..29555f8 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -165,6 +165,27 @@ void lcd_disable(void) static int pm9263_lcd_hw_psram_init(void) { volatile uint16_t x; + unsigned long csa; + + /* Enable CS3 3.3v, no pull-ups */ + csa = at91_sys_read(AT91_MATRIX_EBI1CSA); + at91_sys_write(AT91_MATRIX_EBI1CSA, + csa | AT91_MATRIX_EBI1_DBPUC | + AT91_MATRIX_EBI1_VDDIOMSEL_3_3V); + + /* Configure SMC1 CS0 for PSRAM - 16-bit */ + at91_sys_write(AT91_SMC1_SETUP(0), + AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC1_PULSE(0), + AT91_SMC_NWEPULSE_(7) | AT91_SMC_NCS_WRPULSE_(7) | + AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(7)); + at91_sys_write(AT91_SMC1_CYCLE(0), + AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8)); + at91_sys_write(AT91_SMC1_MODE(0), + AT91_SMC_DBW_16 | + AT91_SMC_PMEN | + AT91_SMC_PS_32); /* setup PB29 as output */ at91_set_gpio_output(PSRAM_CRE_PIN, 1); @@ -218,7 +239,7 @@ static int pm9263_lcd_hw_psram_init(void) at91_sys_write( AT91_MATRIX_SCFG5, AT91_MATRIX_ARBT_FIXED_PRIORITY | (AT91_MATRIX_FIXED_DEFMSTR & (5 << 18)) | AT91_MATRIX_DEFMSTR_TYPE_FIXED | - (AT91_MATRIX_SLOT_CYCLE & (0x80 << 0))); + (AT91_MATRIX_SLOT_CYCLE & (0xFF << 0))); return 0; } |