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authorAndrew Gabbasov <andrew_gabbasov@mentor.com>2014-03-24 02:40:41 -0500
committerPantelis Antoniou <panto@antoniou-consulting.com>2014-04-02 13:16:56 +0300
commitfb823981c550f873270666ce0f6117dbb956c214 (patch)
tree158c31f2ae6ec60ec5175a59b0ceb9bbf737f6d4 /board/rattler
parent33ace362fdf80e2e2ea4cdf2829a5179c52de3f4 (diff)
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mmc: fsl_esdhc: fix calculation of timeout for data transactions
Calculation of the timeout value should be based on actual clock value, written to controller registers. Since mmc->tran_speed is either the maximum allowed speed, or the preliminary value, that is be not yet set to registers, the actual timeout, taken by the controller, based on its clock settings, may be much longer than expected, based on mmc->tran_speed value. In particular it happens at early initialization stage, when typical value of mmc->tran_speed is 20MHz or 26MHz, while actual clock setting, configured in the controller, is 400kHz. It's more correct to use mmc->clock value for timeout calculation instead. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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