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| author | Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> | 2008-05-30 00:53:38 +0900 |
|---|---|---|
| committer | Shinya Kuribayashi <shinya.kuribayashi@necel.com> | 2008-05-30 00:53:38 +0900 |
| commit | e2ad8426624bac457acc6925b6ff408e9bf20466 (patch) | |
| tree | c8659df110945904985611ce85a326ca1e2364cf /board/qemu-mips | |
| parent | 1a3adac81c292f2ee76e43cdeb2fbe8f915fe194 (diff) | |
| download | u-boot-imx-e2ad8426624bac457acc6925b6ff408e9bf20466.zip u-boot-imx-e2ad8426624bac457acc6925b6ff408e9bf20466.tar.gz u-boot-imx-e2ad8426624bac457acc6925b6ff408e9bf20466.tar.bz2 | |
[MIPS] <asm/mipsregs.h>: Update coprocessor register access macros
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Diffstat (limited to 'board/qemu-mips')
| -rw-r--r-- | board/qemu-mips/qemu-mips.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c index 6869074..6e6eab2 100644 --- a/board/qemu-mips/qemu-mips.c +++ b/board/qemu-mips/qemu-mips.c @@ -38,7 +38,7 @@ int checkboard(void) u32 proc_id; u32 config1; - proc_id = read_32bit_cp0_register(CP0_PRID); + proc_id = read_c0_prid(); printf("Board: Qemu -M mips CPU: "); switch (proc_id) { case 0x00018000: @@ -51,7 +51,7 @@ int checkboard(void) printf("4KEc"); break; case 0x00019300: - config1 = read_mips32_cp0_config1(); + config1 = read_c0_config1(); if (config1 & 1) printf("24Kf"); else @@ -64,7 +64,7 @@ int checkboard(void) printf("R4000"); break; case 0x00018100: - config1 = read_mips32_cp0_config1(); + config1 = read_c0_config1(); if (config1 & 1) printf("5Kf"); else |