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author | Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> | 2008-06-05 22:29:00 +0900 |
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committer | Shinya Kuribayashi <shinya.kuribayashi@necel.com> | 2008-06-05 22:29:00 +0900 |
commit | 7daf2ebe9196dd67131a06d85049c3a8a08ca413 (patch) | |
tree | 971e897a7f47762e1d4029780ebd059330d94fc2 /board/purple | |
parent | f0d5a6f060d00358b85c62a921a423ea8df71184 (diff) | |
download | u-boot-imx-7daf2ebe9196dd67131a06d85049c3a8a08ca413.zip u-boot-imx-7daf2ebe9196dd67131a06d85049c3a8a08ca413.tar.gz u-boot-imx-7daf2ebe9196dd67131a06d85049c3a8a08ca413.tar.bz2 |
[MIPS] Update <asm/addrspace.h> header
- Fix traditional KSEG names
- Replace PHYSADDR with CPHYSADDR
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Diffstat (limited to 'board/purple')
-rw-r--r-- | board/purple/purple.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/board/purple/purple.c b/board/purple/purple.c index 89cb906..72d5734 100644 --- a/board/purple/purple.c +++ b/board/purple/purple.c @@ -85,16 +85,16 @@ static void sdram_timing_init (ulong size) while (p4 < 32 && done == 0) { WRITE_MC_IOGP_1; - for (addr = KSEG1 + 0x4000; - addr < KSEG1ADDR (size); + for (addr = CKSEG1 + 0x4000; + addr < CKSEG1ADDR (size); addr = addr + 4) { *(uint *) addr = 0xaa55aa55; } pass = 1; - for (addr = KSEG1 + 0x4000; - addr < KSEG1ADDR (size) && pass == 1; + for (addr = CKSEG1 + 0x4000; + addr < CKSEG1ADDR (size) && pass == 1; addr = addr + 4) { if (*(uint *) addr != 0xaa55aa55) pass = 0; @@ -138,7 +138,7 @@ long int initdram(int board_type) ulong size = (1 << (rows + cols)) * (1 << (dw - 1)) * CFG_NB; void (* sdram_init) (ulong); - sdram_init = (void (*)(ulong)) KSEG0ADDR(&sdram_timing_init); + sdram_init = (void (*)(ulong)) CKSEG0ADDR(&sdram_timing_init); sdram_init(0x10000); @@ -260,14 +260,14 @@ void copy_code (ulong dest_addr) /* flush caches */ - start = KSEG0; + start = CKSEG0; end = start + CFG_DCACHE_SIZE; while(start < end) { cache_unroll(start,Index_Writeback_Inv_D); start += CFG_CACHELINE_SIZE; } - start = KSEG0; + start = CKSEG0; end = start + CFG_ICACHE_SIZE; while(start < end) { cache_unroll(start,Index_Invalidate_I); |