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author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
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committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /board/prodrive/pdnb3/pdnb3.c | |
parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
download | u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.gz u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.bz2 |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'board/prodrive/pdnb3/pdnb3.c')
-rw-r--r-- | board/prodrive/pdnb3/pdnb3.c | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/board/prodrive/pdnb3/pdnb3.c b/board/prodrive/pdnb3/pdnb3.c index 3445a3a..3773ba1 100644 --- a/board/prodrive/pdnb3/pdnb3.c +++ b/board/prodrive/pdnb3/pdnb3.c @@ -34,8 +34,8 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* predefine these here for FPGA programming (before including fpga.c) */ #define SET_FPGA(data) *IXP425_GPIO_GPOUTR = (data) -#define FPGA_DONE_STATE (*IXP425_GPIO_GPINR & CFG_FPGA_DONE) -#define FPGA_INIT_STATE (*IXP425_GPIO_GPINR & CFG_FPGA_INIT) +#define FPGA_DONE_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_DONE) +#define FPGA_INIT_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_INIT) #define OLD_VAL old_val static unsigned long old_val = 0; @@ -56,46 +56,46 @@ int board_init(void) /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; - GPIO_OUTPUT_SET(CFG_GPIO_FPGA_RESET); - GPIO_OUTPUT_ENABLE(CFG_GPIO_FPGA_RESET); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_FPGA_RESET); - GPIO_OUTPUT_SET(CFG_GPIO_SYS_RUNNING); - GPIO_OUTPUT_ENABLE(CFG_GPIO_SYS_RUNNING); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SYS_RUNNING); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SYS_RUNNING); /* * Setup GPIO's for FPGA programming */ - GPIO_OUTPUT_CLEAR(CFG_GPIO_PRG); - GPIO_OUTPUT_CLEAR(CFG_GPIO_CLK); - GPIO_OUTPUT_CLEAR(CFG_GPIO_DATA); - GPIO_OUTPUT_ENABLE(CFG_GPIO_PRG); - GPIO_OUTPUT_ENABLE(CFG_GPIO_CLK); - GPIO_OUTPUT_ENABLE(CFG_GPIO_DATA); - GPIO_OUTPUT_DISABLE(CFG_GPIO_INIT); - GPIO_OUTPUT_DISABLE(CFG_GPIO_DONE); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PRG); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DATA); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_INIT); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DONE); /* * Setup GPIO's for interrupts */ - GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTA); - GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTA); - GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTB); - GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTB); - GPIO_OUTPUT_DISABLE(CFG_GPIO_RESTORE_INT); - GPIO_INT_ACT_LOW_SET(CFG_GPIO_RESTORE_INT); - GPIO_OUTPUT_DISABLE(CFG_GPIO_RESTART_INT); - GPIO_INT_ACT_LOW_SET(CFG_GPIO_RESTART_INT); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTORE_INT); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTORE_INT); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTART_INT); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTART_INT); /* * Setup GPIO's for 33MHz clock output */ *IXP425_GPIO_GPCLKR = 0x01FF0000; - GPIO_OUTPUT_ENABLE(CFG_GPIO_CLK_33M); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK_33M); /* * Setup other chip select's */ - *IXP425_EXP_CS1 = CFG_EXP_CS1; + *IXP425_EXP_CS1 = CONFIG_SYS_EXP_CS1; return 0; } @@ -132,14 +132,14 @@ int do_fpga_boot(unsigned char *fpgadata) int status; int index; int i; - ulong len = CFG_MALLOC_LEN; + ulong len = CONFIG_SYS_MALLOC_LEN; /* * Setup GPIO's for FPGA programming */ - GPIO_OUTPUT_CLEAR(CFG_GPIO_PRG); - GPIO_OUTPUT_CLEAR(CFG_GPIO_CLK); - GPIO_OUTPUT_CLEAR(CFG_GPIO_DATA); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA); /* * Save value so no readback is required upon programming @@ -149,8 +149,8 @@ int do_fpga_boot(unsigned char *fpgadata) /* * First try to decompress fpga image (gzip compressed?) */ - dst = malloc(CFG_FPGA_MAX_SIZE); - if (gunzip(dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) { + dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE); + if (gunzip(dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) { printf("Error: Image has to be gzipp'ed!\n"); return -1; } @@ -204,9 +204,9 @@ int do_fpga_boot(unsigned char *fpgadata) /* * Reset FPGA */ - GPIO_OUTPUT_CLEAR(CFG_GPIO_FPGA_RESET); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_FPGA_RESET); udelay(10); - GPIO_OUTPUT_SET(CFG_GPIO_FPGA_RESET); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET); return (0); } |