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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/prodrive/common/fpga.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/prodrive/common/fpga.c')
| -rw-r--r-- | board/prodrive/common/fpga.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/board/prodrive/common/fpga.c b/board/prodrive/common/fpga.c index f9412a2..14bff07 100644 --- a/board/prodrive/common/fpga.c +++ b/board/prodrive/common/fpga.c @@ -37,11 +37,11 @@ #define DBG(x...) #endif /* DEBUG */ -#define FPGA_PRG CFG_FPGA_PRG /* FPGA program pin (cpu output)*/ -#define FPGA_CLK CFG_FPGA_CLK /* FPGA clk pin (cpu output) */ -#define FPGA_DATA CFG_FPGA_DATA /* FPGA data pin (cpu output) */ -#define FPGA_DONE CFG_FPGA_DONE /* FPGA done pin (cpu input) */ -#define FPGA_INIT CFG_FPGA_INIT /* FPGA init pin (cpu input) */ +#define FPGA_PRG CONFIG_SYS_FPGA_PRG /* FPGA program pin (cpu output)*/ +#define FPGA_CLK CONFIG_SYS_FPGA_CLK /* FPGA clk pin (cpu output) */ +#define FPGA_DATA CONFIG_SYS_FPGA_DATA /* FPGA data pin (cpu output) */ +#define FPGA_DONE CONFIG_SYS_FPGA_DONE /* FPGA done pin (cpu input) */ +#define FPGA_INIT CONFIG_SYS_FPGA_INIT /* FPGA init pin (cpu input) */ #define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */ #define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */ |