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authorPieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>2008-03-17 09:27:56 +0100
committerStefan Roese <sr@denx.de>2008-03-27 10:19:57 +0100
commit511e4f9e7f7b6719e4d91d7f0fc89412b13b5150 (patch)
tree16cbd4eccada0309521b142726e117596532bea2 /board/prodrive/alpr
parent14f73ca679f6fdb44cff0b7304d419db41a0ab69 (diff)
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ppc4xx: Enable cache support on the ALPR board
Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
Diffstat (limited to 'board/prodrive/alpr')
-rw-r--r--board/prodrive/alpr/init.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/board/prodrive/alpr/init.S b/board/prodrive/alpr/init.S
index 135674c..76164ce 100644
--- a/board/prodrive/alpr/init.S
+++ b/board/prodrive/alpr/init.S
@@ -90,7 +90,16 @@ tlbtab:
tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I )
tlbentry( CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X )
tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X )
+#ifdef CONFIG_4xx_DCACHE
+ tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G)
+#else
tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
+#endif
+
+#ifdef CFG_INIT_RAM_DCACHE
+ /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
+ tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
+#endif
tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
/* PCI */