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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/ppmc8260/ppmc8260.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/ppmc8260/ppmc8260.c')
| -rw-r--r-- | board/ppmc8260/ppmc8260.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/board/ppmc8260/ppmc8260.c b/board/ppmc8260/ppmc8260.c index f3c8509..1808abd 100644 --- a/board/ppmc8260/ppmc8260.c +++ b/board/ppmc8260/ppmc8260.c @@ -201,14 +201,14 @@ int checkboard (void) phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; volatile uchar c = 0xff; - volatile uchar *ramaddr0 = (uchar *) (CFG_SDRAM0_BASE); - volatile uchar *ramaddr1 = (uchar *) (CFG_SDRAM1_BASE); - ulong psdmr = CFG_PSDMR; - volatile uchar *ramaddr2 = (uchar *) (CFG_SDRAM2_BASE); - ulong lsdmr = CFG_LSDMR; + volatile uchar *ramaddr0 = (uchar *) (CONFIG_SYS_SDRAM0_BASE); + volatile uchar *ramaddr1 = (uchar *) (CONFIG_SYS_SDRAM1_BASE); + ulong psdmr = CONFIG_SYS_PSDMR; + volatile uchar *ramaddr2 = (uchar *) (CONFIG_SYS_SDRAM2_BASE); + ulong lsdmr = CONFIG_SYS_LSDMR; int i; /* @@ -228,13 +228,13 @@ phys_size_t initdram (int board_type) * accessing the SDRAM with a single-byte transaction." * * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. + * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. */ - memctl->memc_psrt = CFG_PSRT; - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_psrt = CONFIG_SYS_PSRT; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; *ramaddr0++ = c; *ramaddr1++ = c; @@ -246,8 +246,8 @@ phys_size_t initdram (int board_type) } memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; - ramaddr0 = (uchar *) (CFG_SDRAM0_BASE + 0x110); - ramaddr1 = (uchar *) (CFG_SDRAM1_BASE + 0x110); + ramaddr0 = (uchar *) (CONFIG_SYS_SDRAM0_BASE + 0x110); + ramaddr1 = (uchar *) (CONFIG_SYS_SDRAM1_BASE + 0x110); *ramaddr0 = c; *ramaddr1 = c; @@ -271,15 +271,15 @@ phys_size_t initdram (int board_type) #endif /* return total ram size */ - return ((CFG_SDRAM0_SIZE + CFG_SDRAM1_SIZE) * 1024 * 1024); + return ((CONFIG_SYS_SDRAM0_SIZE + CONFIG_SYS_SDRAM1_SIZE) * 1024 * 1024); } #ifdef CONFIG_MISC_INIT_R /* ------------------------------------------------------------------------- */ int misc_init_r (void) { -#ifdef CFG_LED_BASE - uchar ds = *(unsigned char *) (CFG_LED_BASE + 1); +#ifdef CONFIG_SYS_LED_BASE + uchar ds = *(unsigned char *) (CONFIG_SYS_LED_BASE + 1); uchar ss; uchar tmp[64]; int res; @@ -298,10 +298,10 @@ int misc_init_r (void) tmp[17] = '\0'; setenv ("ethaddr", (char *)tmp); /* set the led to show the address */ - *((unsigned char *) (CFG_LED_BASE + 1)) = ds; + *((unsigned char *) (CONFIG_SYS_LED_BASE + 1)) = ds; } } -#endif /* CFG_LED_BASE */ +#endif /* CONFIG_SYS_LED_BASE */ return (0); } #endif /* CONFIG_MISC_INIT_R */ |