Merge branch 'fixes' into cleanups

Conflicts:

	board/atmel/atngw100/atngw100.c
	board/atmel/atstk1000/atstk1000.c
	cpu/at32ap/at32ap700x/gpio.c
	include/asm-avr32/arch-at32ap700x/clk.h
	include/configs/atngw100.h
	include/configs/atstk1002.h
	include/configs/atstk1003.h
	include/configs/atstk1004.h
	include/configs/atstk1006.h
	include/configs/favr-32-ezkit.h
	include/configs/hammerhead.h
	include/configs/mimc200.h

1 files changed, 20 insertions, 15 deletions

diff --git a/board/pm826/pm826.c b/board/pm826/pm826.c
index 7ee3ab6..19e7a00 100644
--- a/board/pm826/pm826.c
+++ b/board/pm826/pm826.c
@@ -25,6 +25,7 @@
 #include <ioports.h>
 #include <mpc8260.h>
 #include <pci.h>
+#include <netdev.h>
 
 /*
  * I/O Port configuration table
@@ -255,7 +256,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 	 *  accessing the SDRAM with a single-byte transaction."
 	 *
 	 * The appropriate BRx/ORx registers have already been set when we
-	 * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+	 * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE.
 	 */
 
 	*sdmr_ptr = sdmr | PSDMR_OP_PREA;
@@ -266,7 +267,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 		*base = c;
 
 	*sdmr_ptr = sdmr | PSDMR_OP_MRW;
-	*(base + CFG_MRS_OFFS) = c;	/* setting MR on address lines */
+	*(base + CONFIG_SYS_MRS_OFFS) = c;	/* setting MR on address lines */
 
 	*sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
 	*base = c;
@@ -281,29 +282,29 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 
 phys_size_t initdram (int board_type)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile memctl8260_t *memctl = &immap->im_memctl;
 
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
 	ulong size8, size9;
 #endif
 	ulong psize = 32 * 1024 * 1024;
 
-	memctl->memc_psrt = CFG_PSRT;
-	memctl->memc_mptpr = CFG_MPTPR;
+	memctl->memc_psrt = CONFIG_SYS_PSRT;
+	memctl->memc_mptpr = CONFIG_SYS_MPTPR;
 
-#ifndef CFG_RAMBOOT
-	size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
-					  (uchar *) CFG_SDRAM_BASE);
-	size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
-					  (uchar *) CFG_SDRAM_BASE);
+#ifndef CONFIG_SYS_RAMBOOT
+	size8 = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR2_8COL,
+					  (uchar *) CONFIG_SYS_SDRAM_BASE);
+	size9 = try_init (memctl, CONFIG_SYS_PSDMR_9COL, CONFIG_SYS_OR2_9COL,
+					  (uchar *) CONFIG_SYS_SDRAM_BASE);
 
 	if (size8 < size9) {
 		psize = size9;
 		printf ("(60x:9COL) ");
 	} else {
-		psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
-						  (uchar *) CFG_SDRAM_BASE);
+		psize = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR2_8COL,
+						  (uchar *) CONFIG_SYS_SDRAM_BASE);
 		printf ("(60x:8COL) ");
 	}
 #endif
@@ -311,10 +312,9 @@ phys_size_t initdram (int board_type)
 }
 
 #if defined(CONFIG_CMD_DOC)
-extern void doc_probe (ulong physadr);
 void doc_init (void)
 {
-	doc_probe (CFG_DOC_BASE);
+	doc_probe (CONFIG_SYS_DOC_BASE);
 }
 #endif
 
@@ -328,3 +328,8 @@ void pci_init_board(void)
 	pci_mpc8250_init(&hose);
 }
 #endif
+
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}