summaryrefslogtreecommitdiff
path: root/board/pcippc2/pcippc2.h
diff options
context:
space:
mode:
authorwdenk <wdenk>2002-08-17 09:36:01 +0000
committerwdenk <wdenk>2002-08-17 09:36:01 +0000
commitaffae2bff825c1a8d2cfeaf7b270188d251d39d2 (patch)
treee025ca5a84cdcd70cff986e09f89e1aaa360499c /board/pcippc2/pcippc2.h
parentcf356ef708390102d493c53d18fd19a5963c6aa9 (diff)
downloadu-boot-imx-affae2bff825c1a8d2cfeaf7b270188d251d39d2.zip
u-boot-imx-affae2bff825c1a8d2cfeaf7b270188d251d39d2.tar.gz
u-boot-imx-affae2bff825c1a8d2cfeaf7b270188d251d39d2.tar.bz2
Initial revision
Diffstat (limited to 'board/pcippc2/pcippc2.h')
-rw-r--r--board/pcippc2/pcippc2.h49
1 files changed, 49 insertions, 0 deletions
diff --git a/board/pcippc2/pcippc2.h b/board/pcippc2/pcippc2.h
new file mode 100644
index 0000000..6e9e2ff
--- /dev/null
+++ b/board/pcippc2/pcippc2.h
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _PCIPPC2_H_
+#define _PCIPPC2_H_
+
+#include <config.h>
+#include <common.h>
+
+#include "hardware.h"
+
+#define FPGA(r, p) (pcippc2_fpga0_phys + HW_FPGA0_##r##_##p)
+#define UART(r) (pcippc2_fpga0_phys + HW_FPGA0_UART1 + NS16550_##r * 4)
+#define RTC(r) (pcippc2_fpga1_phys + HW_FPGA1_RTC + r)
+
+extern u32 pcippc2_fpga0_phys;
+extern u32 pcippc2_fpga1_phys;
+
+extern u32 pcippc2_sdram_size (void);
+
+extern void pcippc2_fpga_init (void);
+
+extern void cpc710_pci_init (void);
+extern void cpc710_pci_enable_timeout (void);
+
+extern unsigned long
+ cpc710_ram_init (void);
+
+#endif