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| author | Xie Xiaobo <r63061@freescale.com> | 2007-03-09 19:08:25 +0800 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2007-04-12 17:39:03 -0500 |
| commit | 6fbf261f8df294e589cfadebebe5468e3c0f29e9 (patch) | |
| tree | 592fb707b77e2a37a5259119149566192a7d7e49 /board/pcippc2/pcippc2.h | |
| parent | aea17f99278818caa327ad0e511b48d1761fb10c (diff) | |
| download | u-boot-imx-6fbf261f8df294e589cfadebebe5468e3c0f29e9.zip u-boot-imx-6fbf261f8df294e589cfadebebe5468e3c0f29e9.tar.gz u-boot-imx-6fbf261f8df294e589cfadebebe5468e3c0f29e9.tar.bz2 | |
Fix two bugs for MPC83xx DDR2 controller SPD Init
There are a few bugs in the cpu/mpc83xx/spd_sdram.c
the first bug is that the picos_to_clk routine introduces a huge
rounding error in 83xx.
the second bug is that the mode register write recovery field is
tWR-1, not tWR >> 1.
Diffstat (limited to 'board/pcippc2/pcippc2.h')
0 files changed, 0 insertions, 0 deletions