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authorYuanquan Chen <B41889@freescale.com>2012-11-26 23:49:45 +0000
committerAndy Fleming <afleming@freescale.com>2012-11-27 18:28:07 -0600
commitc0a4e6b889a702cc2c8375619ce7b093f6b3b1de (patch)
treec707baafbb5971ca6d826e4056fc5969e1f00169 /board/palmld
parent9760b274df8fdc5a6d124f3192535ebe281a78a6 (diff)
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powerpc/p4080ds: fix PCI-e x8 link training down failure
Due to SerDes configuration error, if we set the PCI-e controller link width as x8 in RCW and add a narrower width(such as x4, x2 or x1) PCI-e device to PCI-e slot, it fails to train down to the PCI-e device's link width. According to p4080ds errata PCIe-A003, we reset the PCI-e controller link width to x4 in u-boot. Then it can train down to x2 or x1 width to make the PCI-e link between RC and EP. Signed-off-by: Yuanquan Chen <B41889@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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