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authorJon Loeliger <jdl@freescale.com>2008-06-06 10:48:31 -0500
committerJon Loeliger <jdl@freescale.com>2008-06-06 10:48:31 -0500
commit1a247ba7fa5fb09f56892a09a990f03ce564b3e2 (patch)
tree9dab0ef013cc6dc7883454808ecf6ba4d7a7a94e /board/omap5912osk/lowlevel_init.S
parent2c289e320dcfb3760e99cf1d765cb067194a1202 (diff)
parent8155efbd7ae9c65564ca98affe94631d612ae088 (diff)
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Merge commit 'wd/master'
Diffstat (limited to 'board/omap5912osk/lowlevel_init.S')
-rw-r--r--board/omap5912osk/lowlevel_init.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/board/omap5912osk/lowlevel_init.S b/board/omap5912osk/lowlevel_init.S
index a1fa097..7bfdb26 100644
--- a/board/omap5912osk/lowlevel_init.S
+++ b/board/omap5912osk/lowlevel_init.S
@@ -125,7 +125,7 @@ lock_end:
/*------------------------------------------------------*
* Turn off the watchdog during init... *
- *------------------------------------------------------*/
+ *------------------------------------------------------*/
ldr r0, REG_WATCHDOG
ldr r1, WATCHDOG_VAL1
str r1, [r0]
@@ -191,7 +191,7 @@ skip_TMP_Patch:
mov r0, #0x1800 /* value should be checked */
3:
subs r0, r0, #0x1 /* Decrement count */
- bne 3b
+ bne 3b
/*
* Set SDRAM control values. Disable refresh before MRS command.
@@ -294,7 +294,7 @@ common_tc:
#ifdef CONFIG_H2_OMAP1610
/* inserting additional 2 clock cycle hold time for LAN */
ldr r0, REG_TC_EMIFS_CS1_ADVANCED
- ldr r1, VAL_TC_EMIFS_CS1_ADVANCED
+ ldr r1, VAL_TC_EMIFS_CS1_ADVANCED
str r1, [r0]
#endif
/* Start MPU Timer 1 */