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authorLiu Ying <Ying.Liu@freescale.com>2012-09-14 13:26:04 +0800
committerLiu Ying <Ying.Liu@freescale.com>2012-09-27 11:10:31 +0800
commit306f1510e63b6d3dd793dbef0b05cda6c92078e9 (patch)
treeee76ddbd466ed98fcd81569cc5f0f63d5572a12a /board/omap3/evm
parentfa125315785c2069dd7b85a51bcfd1c9a78db97b (diff)
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ENGR00223797-3 IPUv3:Wait for sw reset finish
This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to reset IPUv3. This makes sure that IPUv3 finishes sofware resetting. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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