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authorwdenk <wdenk>2004-02-23 22:22:28 +0000
committerwdenk <wdenk>2004-02-23 22:22:28 +0000
commit63e73c9a8ed5b32d9c4067ffaad953e9a8fe8f0a (patch)
tree2f8915e0b3024c639748e930b56d60c0d8cf2d99 /board/omap1610inn/omap1610innovator.c
parentcd0a9de68b03e5a54fd2a08f44be318e4397be01 (diff)
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* Patches by Reinhard Meyer, 14 Feb 2004:
- update board/emk tree; use common flash driver - Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c [adapted for other PPC CPUs -- wd] - Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c * Patch by Jon Diekema, 13 Feb 2004: Call show_boot_progress() whenever POST "FAILED" is printed. * Patch by Nishant Kamat, 13 Feb 2004: Add support for TI OMAP1610 H2 Board Fixes for cpu/arm926ejs/interrupt.c (based on Richard Woodruff's patch for arm925, 16 Oct 03) Fix for a timer bug in OMAP1610 Innovator Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2 * Patches by Stephan Linz, 12 Feb 2004: - add support for NIOS timer with variable period preload counter value - prepare POST framework support for NIOS targets * Patch by Denis Peter, 11 Feb 2004: add POST support for the MIP405 board
Diffstat (limited to 'board/omap1610inn/omap1610innovator.c')
-rw-r--r--board/omap1610inn/omap1610innovator.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/board/omap1610inn/omap1610innovator.c b/board/omap1610inn/omap1610innovator.c
index d737f1b..0f67a0c 100644
--- a/board/omap1610inn/omap1610innovator.c
+++ b/board/omap1610inn/omap1610innovator.c
@@ -10,6 +10,8 @@
* Texas Instruments, <www.ti.com>
* Kshitij Gupta <Kshitij@ti.com>
*
+ * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -105,7 +107,28 @@ void flash__init (void)
*************************************************************/
void ether__init (void)
{
-#define ETH_CONTROL_REG 0x0400000b
+#define ETH_CONTROL_REG 0x0400030b
+
+#ifdef CONFIG_H2_OMAP1610
+ #define LAN_RESET_REGISTER 0x0400001c
+
+ /* The debug board on which the lan chip resides may not be powered
+ * ON at the same time as the OMAP chip. So wait in a loop until the
+ * lan reset register (on the debug board) is available (powered on)
+ * and reset the lan chip.
+ */
+
+ *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
+ do {
+ *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
+ udelay (3);
+ } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
+
+ do {
+ *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
+ udelay (3);
+ } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
+#endif
*((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
udelay (3);