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authorStefan Roese <sr@denx.de>2008-06-03 20:19:08 +0200
committerStefan Roese <sr@denx.de>2008-06-03 20:19:08 +0200
commit10a3367955bc2033b288915f8f10d0e507fe2fa1 (patch)
treec3ac82364df83db5d5cb963c64b863b77a20445c /board/omap1610inn/lowlevel_init.S
parent97f7d27c8ecf34879d6b747c10fa9a18c02a4cc0 (diff)
parent1f1554841a4c8e069d331176f0c3059fb2bb8280 (diff)
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Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/omap1610inn/lowlevel_init.S')
-rw-r--r--board/omap1610inn/lowlevel_init.S16
1 files changed, 8 insertions, 8 deletions
diff --git a/board/omap1610inn/lowlevel_init.S b/board/omap1610inn/lowlevel_init.S
index cc8347f..e4ed9f3 100644
--- a/board/omap1610inn/lowlevel_init.S
+++ b/board/omap1610inn/lowlevel_init.S
@@ -58,7 +58,7 @@ lowlevel_init:
str r1, [r0]
/*------------------------------------------------------*
- * Set up ARM CLM registers (IDLECT2) *
+ * Set up ARM CLM registers (IDLECT2) *
*------------------------------------------------------*/
ldr r0, REG_ARM_IDLECT2
ldr r1, VAL_ARM_IDLECT2
@@ -123,7 +123,7 @@ lock_end:
/*------------------------------------------------------*
* Turn off the watchdog during init... *
- *------------------------------------------------------*/
+ *------------------------------------------------------*/
disable_wd:
ldr r0, REG_WATCHDOG
ldr r1, WATCHDOG_VAL1
@@ -156,13 +156,13 @@ watch2Wait:
* and branch to appropriate initialization code.
*/
/* Load physical SDRAM base. */
- mov r0, #0x10000000
+ mov r0, #0x10000000
/* Get current execution location. */
- mov r1, pc
+ mov r1, pc
/* Compare. */
- cmp r1, r0
+ cmp r1, r0
/* Skip over EMIF-fast initialization if running from SDRAM. */
- bge skip_sdram
+ bge skip_sdram
/*
* Delay for SDRAM initialization.
@@ -170,7 +170,7 @@ watch2Wait:
mov r3, #0x1800 /* value should be checked */
3:
subs r3, r3, #0x1 /* Decrement count */
- bne 3b
+ bne 3b
/*
@@ -270,7 +270,7 @@ common_tc:
#ifdef CONFIG_H2_OMAP1610
/* inserting additional 2 clock cycle hold time for LAN */
ldr r0, REG_TC_EMIFS_CS1_ADVANCED
- ldr r1, VAL_TC_EMIFS_CS1_ADVANCED
+ ldr r1, VAL_TC_EMIFS_CS1_ADVANCED
str r1, [r0]
#endif
/* Start MPU Timer 1 */