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authorStephen Warren <swarren@nvidia.com>2012-10-12 09:45:48 +0000
committerTom Warren <twarren@nvidia.com>2012-10-29 09:07:04 -0700
commit699c40e8789cfbb5c3ca4ef2849a4bd051ff79bb (patch)
tree9d25e97fc49d1a0cae8b7a3098ea6d2ffd0265f2 /board/nvidia
parent938176a48274361c0b86b237ff6c0953a08233b3 (diff)
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ARM: tegra: Harmony: enable ULPI USB port
The ULPI port is routed onto pins on the mini PCI Express connector. A standard breakout board may be used to access the port. * Add required DT entries to configure the ULPI port. * Setup up the ULPI pinmux in the board code. * Enable multiple USB controller and ULPI support in the board config. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia')
-rw-r--r--board/nvidia/dts/tegra20-harmony.dts3
-rw-r--r--board/nvidia/harmony/harmony.c9
2 files changed, 11 insertions, 1 deletions
diff --git a/board/nvidia/dts/tegra20-harmony.dts b/board/nvidia/dts/tegra20-harmony.dts
index ca5facb..5645a8d 100644
--- a/board/nvidia/dts/tegra20-harmony.dts
+++ b/board/nvidia/dts/tegra20-harmony.dts
@@ -8,6 +8,7 @@
aliases {
usb0 = "/usb@c5008000";
+ usb1 = "/usb@c5004000";
};
memory {
@@ -52,7 +53,7 @@
};
usb@c5004000 {
- status = "disabled";
+ nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
};
nand-controller@70008000 {
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
index 32ed9bb..c7590ac 100644
--- a/board/nvidia/harmony/harmony.c
+++ b/board/nvidia/harmony/harmony.c
@@ -75,3 +75,12 @@ int board_mmc_init(bd_t *bd)
return 0;
}
#endif
+
+void pin_mux_usb(void)
+{
+ funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
+ pinmux_set_func(PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
+ pinmux_tristate_disable(PINGRP_CDEV2);
+ /* USB2 PHY reset GPIO */
+ pinmux_tristate_disable(PINGRP_UAC);
+}