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authorSimon Glass <sjg@chromium.org>2011-11-05 03:56:52 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-09 17:30:09 +0100
commit831a077f11869dfc33ca2316a4bdeba203e8ce60 (patch)
tree0bff58fe99a6b0ac4778382b76c775cb78de48a7 /board/nvidia
parent80433c9ac6fd3bd0fe1707a04d9668db4aba1dde (diff)
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tegra2: Enable instruction cache
Since low-level init is skipped, the instruction cache is never enabled on Tegra2. This explicitly calls this initialization as soon as the A9 is initialized. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia')
-rw-r--r--board/nvidia/common/board.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 56850cc..c806a6b 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -114,6 +114,9 @@ int board_init(void)
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
+ /* We didn't do this init in start.S, so do it now */
+ cpu_init_cp15();
+
/* Initialize essential common plls */
clock_early_init();