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authorSimon Glass <sjg@chromium.org>2014-09-03 17:37:03 -0600
committerSimon Glass <sjg@chromium.org>2014-09-10 12:59:59 -0600
commit2fccd2d96badcdf6165658a99771a4c475586279 (patch)
treeec6bc920aa2e263ab3880c54a41aee62aec065c1 /board/nvidia
parenta47411110ce982a9c66ef039622f2e32cf9fab5f (diff)
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tegra: Convert tegra GPIO driver to use driver model
This is an implementation of GPIOs for Tegra that uses driver model. It has been tested on trimslice and also using the new iotrace feature. The implementation uses a top-level GPIO device (which has no actual GPIOS). Under this all the banks are created as separate GPIO devices. The GPIOs are named as per the Tegra datasheet/header files: A0..A7, B0..B7, ..., Z0..Z7, AA0..AA7, etc. Since driver model is not yet available before relocation, or in SPL, a special function is provided for seaboard's SPL code. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/nvidia')
-rw-r--r--board/nvidia/seaboard/seaboard.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index ce2db40..6a243f0 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -22,7 +22,7 @@ void gpio_early_init_uart(void)
#ifndef CONFIG_SPL_BUILD
gpio_request(GPIO_PI3, NULL);
#endif
- gpio_direction_output(GPIO_PI3, 0);
+ tegra_spl_gpio_direction_output(GPIO_PI3, 0);
}
#endif