diff options
author | Stephen Warren <swarren@nvidia.com> | 2014-03-21 12:28:56 -0600 |
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committer | Tom Warren <twarren@nvidia.com> | 2014-04-17 08:41:05 -0700 |
commit | dfb42fc95df6b5908fb593db9132018233430fe9 (patch) | |
tree | 5015bb6c6c7e60401182b4306b6e83df1c014386 /board/nvidia/venice2 | |
parent | a45fa436854a4116c19dd8794c9b033a3cf117bc (diff) | |
download | u-boot-imx-dfb42fc95df6b5908fb593db9132018233430fe9.zip u-boot-imx-dfb42fc95df6b5908fb593db9132018233430fe9.tar.gz u-boot-imx-dfb42fc95df6b5908fb593db9132018233430fe9.tar.bz2 |
ARM: tegra: pinmux naming consistency fixes
Clean up the naming of pinmux-related objects:
* Refer to drive groups rather than pad groups to match the Linux kernel.
* Ensure all pinmux API types are prefixed with pmux_, values (defines)
are prefixed with PMUX_, and functions prefixed with pinmux_.
* Modify a few type names to make their content clearer.
* Minimal changes to SoC-specific .h/.c files are made so the code still
compiles. A separate per-SoC change will be made immediately following,
in order to keep individual patch size down.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia/venice2')
-rw-r--r-- | board/nvidia/venice2/pinmux-config-venice2.h | 40 | ||||
-rw-r--r-- | board/nvidia/venice2/venice2.c | 15 |
2 files changed, 28 insertions, 27 deletions
diff --git a/board/nvidia/venice2/pinmux-config-venice2.h b/board/nvidia/venice2/pinmux-config-venice2.h index b3d68d5..51cd4bf 100644 --- a/board/nvidia/venice2/pinmux-config-venice2.h +++ b/board/nvidia/venice2/pinmux-config-venice2.h @@ -8,9 +8,9 @@ #ifndef _PINMUX_CONFIG_VENICE2_H_ #define _PINMUX_CONFIG_VENICE2_H_ -#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io) \ +#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \ { \ - .pingroup = PINGRP_##_pingroup, \ + .pingrp = PINGRP_##_pingrp, \ .func = PMUX_FUNC_##_mux, \ .pull = PMUX_PULL_##_pull, \ .tristate = PMUX_TRI_##_tri, \ @@ -20,9 +20,9 @@ .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ } -#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \ +#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \ { \ - .pingroup = PINGRP_##_pingroup, \ + .pingrp = PINGRP_##_pingrp, \ .func = PMUX_FUNC_##_mux, \ .pull = PMUX_PULL_##_pull, \ .tristate = PMUX_TRI_##_tri, \ @@ -32,9 +32,9 @@ .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ } -#define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \ +#define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \ { \ - .pingroup = PINGRP_##_pingroup, \ + .pingrp = PINGRP_##_pingrp, \ .func = PMUX_FUNC_##_mux, \ .pull = PMUX_PULL_##_pull, \ .tristate = PMUX_TRI_##_tri, \ @@ -44,9 +44,9 @@ .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ } -#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \ +#define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \ { \ - .pingroup = PINGRP_##_pingroup, \ + .pingrp = PINGRP_##_pingrp, \ .func = PMUX_FUNC_##_mux, \ .pull = PMUX_PULL_##_pull, \ .tristate = PMUX_TRI_##_tri, \ @@ -56,9 +56,9 @@ .ioreset = PMUX_PIN_IO_RESET_##_ioreset \ } -#define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \ +#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \ { \ - .pingroup = PINGRP_##_pingroup, \ + .pingrp = PINGRP_##_pingrp, \ .func = PMUX_FUNC_##_mux, \ .pull = PMUX_PULL_##_pull, \ .tristate = PMUX_TRI_##_tri, \ @@ -70,19 +70,19 @@ #define USB_PINMUX CEC_PINMUX -#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ +#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ { \ - .padgrp = PDRIVE_PINGROUP_##_padgrp, \ + .drvgrp = PDRIVE_PINGROUP_##_drvgrp, \ .slwf = _slwf, \ .slwr = _slwr, \ .drvup = _drvup, \ .drvdn = _drvdn, \ - .lpmd = PGRP_LPMD_##_lpmd, \ - .schmt = PGRP_SCHMT_##_schmt, \ - .hsm = PGRP_HSM_##_hsm, \ + .lpmd = PMUX_LPMD_##_lpmd, \ + .schmt = PMUX_SCHMT_##_schmt, \ + .hsm = PMUX_HSM_##_hsm, \ } -static struct pingroup_config tegra124_pinmux_common[] = { +static struct pmux_pingrp_config tegra124_pinmux_common[] = { /* EXTPERIPH1 pinmux */ DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, OUTPUT), @@ -286,12 +286,12 @@ static struct pingroup_config tegra124_pinmux_common[] = { DEFAULT_PINMUX(SPDIF_OUT, RSVD1, NORMAL, TRISTATE, INPUT), }; -static struct pingroup_config unused_pins_lowpower[] = { +static struct pmux_pingrp_config unused_pins_lowpower[] = { DEFAULT_PINMUX(CLK1_REQ, RSVD3, DOWN, TRISTATE, OUTPUT), }; /* Initially setting all used GPIO's to non-TRISTATE */ -static struct pingroup_config tegra124_pinmux_set_nontristate[] = { +static struct pmux_pingrp_config tegra124_pinmux_set_nontristate[] = { DEFAULT_PINMUX(GPIO_X4_AUD, RSVD1, DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(GPIO_X7_AUD, RSVD1, DOWN, NORMAL, OUTPUT), DEFAULT_PINMUX(GPIO_W2_AUD, RSVD1, UP, NORMAL, INPUT), @@ -331,8 +331,8 @@ static struct pingroup_config tegra124_pinmux_set_nontristate[] = { DEFAULT_PINMUX(GPIO_PK1, GMI, NORMAL, NORMAL, OUTPUT), }; -static struct padctrl_config venice2_padctrl[] = { - /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */ +static struct pmux_drvgrp_config venice2_padctrl[] = { + /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */ DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE), }; diff --git a/board/nvidia/venice2/venice2.c b/board/nvidia/venice2/venice2.c index 1ed2fd7..15082c4 100644 --- a/board/nvidia/venice2/venice2.c +++ b/board/nvidia/venice2/venice2.c @@ -19,15 +19,16 @@ */ void pinmux_init(void) { - pinmux_config_table(tegra124_pinmux_set_nontristate, - ARRAY_SIZE(tegra124_pinmux_set_nontristate)); + pinmux_config_pingrp_table(tegra124_pinmux_set_nontristate, + ARRAY_SIZE(tegra124_pinmux_set_nontristate)); - pinmux_config_table(tegra124_pinmux_common, - ARRAY_SIZE(tegra124_pinmux_common)); + pinmux_config_pingrp_table(tegra124_pinmux_common, + ARRAY_SIZE(tegra124_pinmux_common)); - pinmux_config_table(unused_pins_lowpower, - ARRAY_SIZE(unused_pins_lowpower)); + pinmux_config_pingrp_table(unused_pins_lowpower, + ARRAY_SIZE(unused_pins_lowpower)); /* Initialize any non-default pad configs (APB_MISC_GP regs) */ - padgrp_config_table(venice2_padctrl, ARRAY_SIZE(venice2_padctrl)); + pinmux_config_drvgrp_table(venice2_padctrl, + ARRAY_SIZE(venice2_padctrl)); } |