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author | Stephen Warren <swarren@nvidia.com> | 2014-03-21 12:29:00 -0600 |
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committer | Tom Warren <twarren@nvidia.com> | 2014-04-17 08:41:06 -0700 |
commit | 1fa3a634137c9f40b207cff1079fe0dfbd9b3378 (patch) | |
tree | 97f9c3acf7f6316007380d674c97514a769b302b /board/nvidia/venice2/pinmux-config-venice2.h | |
parent | 803d01edc27b0ec23a0b0416a65a6106c8b79103 (diff) | |
download | u-boot-imx-1fa3a634137c9f40b207cff1079fe0dfbd9b3378.zip u-boot-imx-1fa3a634137c9f40b207cff1079fe0dfbd9b3378.tar.gz u-boot-imx-1fa3a634137c9f40b207cff1079fe0dfbd9b3378.tar.bz2 |
ARM: tegra: Tegra114 pinmux cleanup
This renames all the pinmux pins, drive groups, and functions so they
have a prefix which matches the type name. These lists are also auto-
generated using scripts that were also used to generate the kernel
pinctrl drivers. This ensures that the lists are consistent between the
two.
The entries in tegra114_pingroups[] are all updated to remove the columns
which are no longer used.
All affected code is updated to match.
This introduces a few changes to pin/group/function naming and the set of
available functions for each pin. The new values now exactly match the
TRM; the chip documentation. I adjusted a few entries in
pinmux-config-dalmore.h due to this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia/venice2/pinmux-config-venice2.h')
0 files changed, 0 insertions, 0 deletions