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authorSimon Glass <sjg@chromium.org>2012-10-17 13:24:58 +0000
committerTom Warren <twarren@nvidia.com>2012-11-19 08:15:39 -0700
commit77139f5170ca74a7724f773ac8b355f8e191576c (patch)
tree020a3c870961a5b58a4b0a7513b8b0784763d9da /board/nvidia/dts/tegra20-seaboard.dts
parent44706a87654bae810cc0740e9cafde134c5796f1 (diff)
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tegra: fdt: Add LCD definitions for Seaboard
The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled by one of the PWMs. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia/dts/tegra20-seaboard.dts')
-rw-r--r--board/nvidia/dts/tegra20-seaboard.dts33
1 files changed, 33 insertions, 0 deletions
diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts
index 25a63a0..dd98ca4 100644
--- a/board/nvidia/dts/tegra20-seaboard.dts
+++ b/board/nvidia/dts/tegra20-seaboard.dts
@@ -163,4 +163,37 @@
compatible = "hynix,hy27uf4g2b", "nand-flash";
};
};
+
+ host1x {
+ status = "okay";
+ dc@54200000 {
+ status = "okay";
+ rgb {
+ status = "okay";
+ nvidia,panel = <&lcd_panel>;
+ };
+ };
+ };
+
+ lcd_panel: panel {
+ /* Seaboard has 1366x768 */
+ clock = <70600000>;
+ xres = <1366>;
+ yres = <768>;
+ left-margin = <58>;
+ right-margin = <58>;
+ hsync-len = <58>;
+ lower-margin = <4>;
+ upper-margin = <4>;
+ vsync-len = <4>;
+ hsync-active-high;
+ nvidia,bits-per-pixel = <16>;
+ nvidia,pwm = <&pwm 2 0>;
+ nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
+ nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
+ nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
+ nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
+ nvidia,panel-timings = <400 4 203 17 15>;
+ };
+
};