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authorTom Warren <twarren@nvidia.com>2013-02-26 12:26:55 -0700
committerTom Warren <twarren@nvidia.com>2013-03-14 11:06:44 -0700
commit190be1f9b74b0c8c2f1b2735774a6536758837af (patch)
tree7e10f29ff2dc55ab098f0332151ca0bde8cdeb15 /board/nvidia/common
parent38797bcb1f8306429409ca2831309342b77a2e37 (diff)
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Tegra30: MMC: Add SD bus power-rail and SDMMC pad init routines
T30 requires specific SDMMC pad programming, and bus power-rail bringup. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'board/nvidia/common')
-rw-r--r--board/nvidia/common/board.c31
1 files changed, 30 insertions, 1 deletions
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index babbe08..7d9f361 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -49,6 +49,7 @@
#include <asm/arch-tegra/usb.h>
#endif
#ifdef CONFIG_TEGRA_MMC
+#include <asm/arch-tegra/tegra_mmc.h>
#include <asm/arch-tegra/mmc.h>
#endif
#include <i2c.h>
@@ -245,4 +246,32 @@ int board_mmc_init(bd_t *bd)
return 0;
}
-#endif
+
+void pad_init_mmc(struct mmc_host *host)
+{
+#if defined(CONFIG_TEGRA30)
+ enum periph_id id = host->mmc_id;
+ u32 val;
+
+ debug("%s: sdmmc address = %08x, id = %d\n", __func__,
+ (unsigned int)host->reg, id);
+
+ /* Set the pad drive strength for SDMMC1 or 3 only */
+ if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
+ debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
+ __func__);
+ return;
+ }
+
+ val = readl(&host->reg->sdmemcmppadctl);
+ val &= 0xFFFFFFF0;
+ val |= MEMCOMP_PADCTRL_VREF;
+ writel(val, &host->reg->sdmemcmppadctl);
+
+ val = readl(&host->reg->autocalcfg);
+ val &= 0xFFFF0000;
+ val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
+ writel(val, &host->reg->autocalcfg);
+#endif /* T30 */
+}
+#endif /* MMC */