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author | Tom Warren <twarren@nvidia.com> | 2013-03-06 16:16:22 -0700 |
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committer | Tom Warren <twarren@nvidia.com> | 2013-03-14 11:06:43 -0700 |
commit | 8ca79b2ff467bda3bc1cfe7fe566f0c1189881dc (patch) | |
tree | 7cc9230b3f5f27c89df60bcb20c41c24bcbbb160 /board/nvidia/cardhu/cardhu.c | |
parent | 8b7776b9f95d542d0e81357c4f8aa32f7bf466e5 (diff) | |
download | u-boot-imx-8ca79b2ff467bda3bc1cfe7fe566f0c1189881dc.zip u-boot-imx-8ca79b2ff467bda3bc1cfe7fe566f0c1189881dc.tar.gz u-boot-imx-8ca79b2ff467bda3bc1cfe7fe566f0c1189881dc.tar.bz2 |
Tegra30: Cardhu: Add pad config tables/code based on pinmux code
Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().
Currently, only SDIO1CFG is changed as per the TRM to work with
the SD-card slot on Cardhu.
Thanks to StephenW for the suggestion/original idea.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'board/nvidia/cardhu/cardhu.c')
-rw-r--r-- | board/nvidia/cardhu/cardhu.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c index df4cb6b..08e9b7b 100644 --- a/board/nvidia/cardhu/cardhu.c +++ b/board/nvidia/cardhu/cardhu.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2010-2012 + * (C) Copyright 2010-2013 * NVIDIA Corporation <www.nvidia.com> * * See file CREDITS for list of people who contributed to this @@ -23,6 +23,7 @@ #include <common.h> #include <asm/arch/pinmux.h> +#include <asm/arch/gp_padctrl.h> #include "pinmux-config-cardhu.h" /* @@ -36,4 +37,7 @@ void pinmux_init(void) pinmux_config_table(unused_pins_lowpower, ARRAY_SIZE(unused_pins_lowpower)); + + /* Initialize any non-default pad configs (APB_MISC_GP regs) */ + padgrp_config_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl)); } |