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| author | Nishanth Menon <nm@ti.com> | 2015-03-09 17:12:09 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-03-13 09:29:33 -0400 |
| commit | cdef0b3f3ae56db2acd0a79c3a4089db281378fe (patch) | |
| tree | a588234fba95d3b76243ccfbd89559844b680f13 /board/nokia/rx51 | |
| parent | c6f90e1418a84fe5fa463b38403bd1845cb6a59c (diff) | |
| download | u-boot-imx-cdef0b3f3ae56db2acd0a79c3a4089db281378fe.zip u-boot-imx-cdef0b3f3ae56db2acd0a79c3a4089db281378fe.tar.gz u-boot-imx-cdef0b3f3ae56db2acd0a79c3a4089db281378fe.tar.bz2 | |
ARM: OMAP3: rx51: Enable workaround for ARM errata 454179, 430973, 621766
RX51 has a secure logic which uses different parameters compared to
traditional implementation. So, make the generic secure acr write
over-ride-able by board file and refactor rx51 code to use this.
While at it, enable the OMAP3 specific errata code for 454179, 430973,
621766.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/nokia/rx51')
| -rw-r--r-- | board/nokia/rx51/rx51.c | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c index 08fcaf2..3d019b0 100644 --- a/board/nokia/rx51/rx51.c +++ b/board/nokia/rx51/rx51.c @@ -341,6 +341,17 @@ static void omap3_emu_romcode_call(u32 service_id, u32 *parameters) do_omap3_emu_romcode_call(service_id, OMAP3_PUBLIC_SRAM_SCRATCH_AREA); } +void omap3_set_aux_cr_secure(u32 acr) +{ + struct emu_hal_params_rx51 emu_romcode_params = { 0, }; + + emu_romcode_params.num_params = 2; + emu_romcode_params.param1 = acr; + + omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR, + (u32 *)&emu_romcode_params); +} + /* * Routine: omap3_update_aux_cr_secure_rx51 * Description: Modify the contents Auxiliary Control Register. @@ -350,19 +361,13 @@ static void omap3_emu_romcode_call(u32 service_id, u32 *parameters) */ static void omap3_update_aux_cr_secure_rx51(u32 set_bits, u32 clear_bits) { - struct emu_hal_params_rx51 emu_romcode_params = { 0, }; u32 acr; /* Read ACR */ asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); acr &= ~clear_bits; acr |= set_bits; - - emu_romcode_params.num_params = 2; - emu_romcode_params.param1 = acr; - - omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR, - (u32 *)&emu_romcode_params); + omap3_set_aux_cr_secure(acr); } /* |