Merge branch 'master' of rsync://rsync.denx.de/git/u-boot

5 files changed, 188 insertions, 10 deletions

diff --git a/board/nc650/Makefile b/board/nc650/Makefile
index a4dd85f..8dc4934 100644
--- a/board/nc650/Makefile
+++ b/board/nc650/Makefile
@@ -1,4 +1,5 @@
 #
+# (C) Copyright 2006 Detlev Zundel, dzu@denx.de
 # (C) Copyright 2004
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
@@ -25,7 +26,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= lib$(BOARD).a
 
-OBJS	= $(BOARD).o flash.o
+OBJS	= $(BOARD).o nand.o flash.o
 
 $(LIB):	.depend $(OBJS)
 	$(AR) crv $@ $(OBJS)
diff --git a/board/nc650/config.mk b/board/nc650/config.mk
index fa8ba31..5b2284a 100644
--- a/board/nc650/config.mk
+++ b/board/nc650/config.mk
@@ -1,4 +1,5 @@
 #
+# (C) Copyright 2006 Detlev Zundel, dzu@denx.de
 # (C) Copyright 2004
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
@@ -26,3 +27,4 @@
 #
 
 TEXT_BASE = 0x40700000
+BOARDLIBS = drivers/nand/libnand.a
diff --git a/board/nc650/flash.c b/board/nc650/flash.c
index ce2f83b..8d7c172 100644
--- a/board/nc650/flash.c
+++ b/board/nc650/flash.c
@@ -32,6 +32,8 @@
 #include <common.h>
 #include <mpc8xx.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
 #define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1  | OR_TRLX | OR_CSNT_SAM | \
 				      OR_SCY_2_CLK | OR_EHTR | OR_BI)
@@ -95,8 +97,6 @@ unsigned long flash_init (void)
 #ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
 	int scy, trlx, flash_or_timing, clk_diff;
 
-	DECLARE_GLOBAL_DATA_PTR;
-
 	scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
 	if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
 		trlx = OR_TRLX;
diff --git a/board/nc650/nand.c b/board/nc650/nand.c
new file mode 100644
index 0000000..f27e536
--- /dev/null
+++ b/board/nc650/nand.c
@@ -0,0 +1,117 @@
+/*
+ * (C) Copyright 2006 Detlev Zundel, dzu@denx.de
+ * (C) Copyright 2006 DENX Software Engineering
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+
+#include <nand.h>
+
+#if defined(CONFIG_IDS852_REV1)
+/*
+ *	hardware specific access to control-lines
+ */
+static void nc650_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+	struct nand_chip *this = mtd->priv;
+
+	switch(cmd) {
+		case NAND_CTL_SETCLE:
+			this->IO_ADDR_W += 2;
+			break;
+		case NAND_CTL_CLRCLE:
+			this->IO_ADDR_W -= 2;
+			break;
+		case NAND_CTL_SETALE:
+			this->IO_ADDR_W += 1;
+			break;
+		case NAND_CTL_CLRALE:
+			this->IO_ADDR_W -= 1;
+			break;
+		case NAND_CTL_SETNCE:
+		case NAND_CTL_CLRNCE:
+			/* nop */
+			break;
+	}
+}
+#elif defined(CONFIG_IDS852_REV2)
+/*
+ *	hardware specific access to control-lines
+ */
+static void nc650_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+	struct nand_chip *this = mtd->priv;
+
+	switch(cmd) {
+		case NAND_CTL_SETCLE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0; 
+			break;
+		case NAND_CTL_CLRCLE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
+			break;
+		case NAND_CTL_SETALE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0; 
+			break;
+		case NAND_CTL_CLRALE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
+			break;
+		case NAND_CTL_SETNCE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
+			break;
+		case NAND_CTL_CLRNCE:
+ 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0; 
+			break;
+	}
+}
+#else
+#error Unknown IDS852 module revision
+#endif
+
+/*
+ * Board-specific NAND initialization. The following members of the
+ * argument are board-specific (per include/linux/mtd/nand.h):
+ * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
+ * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
+ * - hwcontrol: hardwarespecific function for accesing control-lines
+ * - dev_ready: hardwarespecific function for  accesing device ready/busy line
+ * - enable_hwecc?: function to enable (reset)  hardware ecc generator. Must
+ *   only be provided if a hardware ECC is available
+ * - eccmode: mode of ecc, see defines
+ * - chip_delay: chip dependent delay for transfering data from array to
+ *   read regs (tR)
+ * - options: various chip options. They can partly be set to inform
+ *   nand_scan about special functionality. See the defines for further
+ *   explanation
+ * Members with a "?" were not set in the merged testing-NAND branch,
+ * so they are not set here either.
+ */
+void board_nand_init(struct nand_chip *nand)
+{
+
+	nand->hwcontrol = nc650_hwcontrol;
+	nand->eccmode = NAND_ECC_SOFT;
+	nand->chip_delay = 12;
+/*	nand->options = NAND_SAMSUNG_LP_OPTIONS;*/
+}
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
diff --git a/board/nc650/nc650.c b/board/nc650/nc650.c
index fe96b93..c90ac9c 100644
--- a/board/nc650/nc650.c
+++ b/board/nc650/nc650.c
@@ -1,4 +1,5 @@
 /*
+ * (C) Copyright 2006 Detlev Zundel, dzu@denx.de
  * (C) Copyright 2001
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
@@ -108,7 +109,16 @@ const uint nand_flash_table[] = {
 
 int checkboard (void)
 {
-	puts ("Board: NC650\n");
+#if !defined(CONFIG_CP850)
+	puts ("Board: NC650");
+#else
+	puts ("Board: CP850");
+#endif
+#if defined(CONFIG_IDS852_REV1)
+	puts (" with IDS852 rev 1 module\n");
+#elif defined(CONFIG_IDS852_REV2)
+	puts (" with IDS852 rev 2 module\n");
+#endif
 	return 0;
 }
 
@@ -241,13 +251,61 @@ static long int dram_size (long int mamr_value, long int *base, long int maxsize
 	return (get_ram_size(base, maxsize));
 }
 
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-void nand_init(void)
-{
-	extern unsigned long nand_probe(unsigned long physadr);
 
-	unsigned long totlen = nand_probe(CFG_NAND_BASE);
+#if defined(CONFIG_CP850)
+
+#define DPRAM_VARNAME           "KP850DIP"
+#define PARAM_ADDR              0x7C0
+#define NAME_ADDR               0x7F8
+#define BOARD_NAME              "KP01"
+#define DEFAULT_LB              "241111"
 
-	printf ("%4lu MB\n", totlen >> 20);
+int misc_init_r(void)
+{
+	int             iCompatMode = 0;
+	char            *pParam = NULL;
+	char            *envlb;
+	
+	/* 
+	   First byte in CPLD read address space signals compatibility mode
+	   0 - cp850
+	   1 - kp852
+	*/
+	pParam = (char*)(CFG_CPLD_BASE);
+	if( *pParam != 0)
+		iCompatMode = 1;
+	
+	if ( iCompatMode != 0) {
+		/* 
+		   In KP852 compatibility mode we have to write to
+		   DPRAM as early as possible the binary coded
+		   line config and board name.
+		   The line config is derived from the environment
+		   variable DPRAM_VARNAME by converting from ASCII
+		   to binary per character.
+		*/
+		if ( (envlb = getenv ( DPRAM_VARNAME )) == 0) {
+			setenv( DPRAM_VARNAME, DEFAULT_LB);
+			envlb = DEFAULT_LB;
+		}
+		
+		/* Status string */
+		printf("Mode:  KP852(LB=%s)\n", envlb);
+
+		/* copy appl init */
+		pParam = (char*)(DPRAM_BASE_ADDR + PARAM_ADDR);
+		while (*envlb) {
+			*(pParam++) = *(envlb++) - '0';
+		}
+		*pParam = '\0';
+
+		/* copy board id */
+		pParam = (char*)(DPRAM_BASE_ADDR + NAME_ADDR);
+		strcpy( pParam, BOARD_NAME);
+	} else {
+		puts("Mode:  CP850\n");
+	}
+	
+	return 0;
 }
 #endif