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| author | Ben Warren <bwarren@qstreams.com> | 2006-09-07 16:51:04 -0400 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2006-11-03 19:42:19 -0600 |
| commit | b24f119d672b709d153ff2ac091d4aa63ec6877d (patch) | |
| tree | fd336614e7e0b3363512be41e501b6e9d6a5331a /board/nc650/nand.c | |
| parent | bb99ad6d8257bf828f150d40f507b30d80a4a7ae (diff) | |
| download | u-boot-imx-b24f119d672b709d153ff2ac091d4aa63ec6877d.zip u-boot-imx-b24f119d672b709d153ff2ac091d4aa63ec6877d.tar.gz u-boot-imx-b24f119d672b709d153ff2ac091d4aa63ec6877d.tar.bz2 | |
Multi-bus I2C implementation of MPC834x
Hello,
Attached is a patch implementing multiple I2C buses on the MPC834x CPU
family and the MPC8349EMDS board in particular.
This patch requires Patch 1 (Add support for multiple I2C buses).
Testing was performed on a 533MHz board.
/*** Note: This patch replaces ticket DNX#2006083042000027 ***/
Signed-off-by: Ben Warren <bwarren@qstreams.com>
CHANGELOG:
Implemented driver-level code to support two I2C buses on the
MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds
are 50kHz, 100kHz and 400kHz on each bus.
regards,
Ben
Diffstat (limited to 'board/nc650/nand.c')
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