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authorJon Loeliger <jdl@freescale.com>2008-06-06 10:48:31 -0500
committerJon Loeliger <jdl@freescale.com>2008-06-06 10:48:31 -0500
commit1a247ba7fa5fb09f56892a09a990f03ce564b3e2 (patch)
tree9dab0ef013cc6dc7883454808ecf6ba4d7a7a94e /board/mx1fs2
parent2c289e320dcfb3760e99cf1d765cb067194a1202 (diff)
parent8155efbd7ae9c65564ca98affe94631d612ae088 (diff)
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Merge commit 'wd/master'
Diffstat (limited to 'board/mx1fs2')
-rw-r--r--board/mx1fs2/flash.c2
-rw-r--r--board/mx1fs2/lowlevel_init.S18
2 files changed, 10 insertions, 10 deletions
diff --git a/board/mx1fs2/flash.c b/board/mx1fs2/flash.c
index 47885bc..73ce895 100644
--- a/board/mx1fs2/flash.c
+++ b/board/mx1fs2/flash.c
@@ -612,7 +612,7 @@ bad_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
* @param info:
* @param src: source of copy transaction
* @param addr: where to copy to
- * @param cnt: number of bytes to copy
+ * @param cnt: number of bytes to copy
*
* @return error code
*/
diff --git a/board/mx1fs2/lowlevel_init.S b/board/mx1fs2/lowlevel_init.S
index 8211beb..4b2cb48 100644
--- a/board/mx1fs2/lowlevel_init.S
+++ b/board/mx1fs2/lowlevel_init.S
@@ -166,22 +166,22 @@ lowlevel_init:
ldr r1,=0x00221000 /* adr of SDCTRL0 */
ldr r0,=0x92120200
str r0,[r1,#0] /* put in precharge command mode */
- ldr r2,=0x08200000 /* adr for precharge cmd */
+ ldr r2,=0x08200000 /* adr for precharge cmd */
ldr r0,[r2,#0] /* precharge */
ldr r0,=0xA2120200
ldr r2,=0x08000000 /* start of SDRAM */
str r0,[r1,#0] /* put in auto-refresh mode */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
+ ldr r0,[r2,#0] /* auto-refresh */
+ ldr r0,[r2,#0] /* auto-refresh */
+ ldr r0,[r2,#0] /* auto-refresh */
+ ldr r0,[r2,#0] /* auto-refresh */
+ ldr r0,[r2,#0] /* auto-refresh */
+ ldr r0,[r2,#0] /* auto-refresh */
+ ldr r0,[r2,#0] /* auto-refresh */
ldr r0,=0xB2120200
ldr r2,=0x08111800
str r0,[r1,#0] /* setup for mode register of SDRAM */
- ldr r0,[r2,#0] /* program mode register */
+ ldr r0,[r2,#0] /* program mode register */
ldr r0,=0x82124267
str r0,[r1,#0] /* back to normal operation */