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| author | Haiying Wang <Haiying.Wang@freescale.com> | 2007-06-19 14:18:32 -0400 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2007-08-14 01:45:51 -0500 |
| commit | d111d6382c99fdea08c2312eeeae8786945e189a (patch) | |
| tree | 689badef14549bda5ac780242e9e2a6f8047a522 /board/mx1fs2/intel.h | |
| parent | 3db0bef59eab1155801618cef5c481e97553b597 (diff) | |
| download | u-boot-imx-d111d6382c99fdea08c2312eeeae8786945e189a.zip u-boot-imx-d111d6382c99fdea08c2312eeeae8786945e189a.tar.gz u-boot-imx-d111d6382c99fdea08c2312eeeae8786945e189a.tar.bz2 | |
Empirically set cpo and clk_adjust for mpc85xx DDR2 support
This patch is against u-boot-mpc85xx.git of www.denx.com
Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
both MPC8548CDS board and MPC8568MDS board, especially for supporting
533MHz DDR2.
Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
DDR2 on all current board versions especially ver 1.92 or later to bring
up.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Diffstat (limited to 'board/mx1fs2/intel.h')
0 files changed, 0 insertions, 0 deletions