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| author | Wolfgang Denk <wd@pollux.denx.de> | 2006-04-16 10:51:58 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@pollux.denx.de> | 2006-04-16 10:51:58 +0200 |
| commit | cf48eb9abd76e5a056937a4e49be094826026abc (patch) | |
| tree | 1e05002f42f0f174f74d712b34c87ed4f99b003f /board/mx1ads | |
| parent | 807522fc9ae49e022c9f3556506b4f4c961b17aa (diff) | |
| download | u-boot-imx-cf48eb9abd76e5a056937a4e49be094826026abc.zip u-boot-imx-cf48eb9abd76e5a056937a4e49be094826026abc.tar.gz u-boot-imx-cf48eb9abd76e5a056937a4e49be094826026abc.tar.bz2 | |
Some code cleanup
Diffstat (limited to 'board/mx1ads')
| -rw-r--r-- | board/mx1ads/mx1ads.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c index 913f95c..abf2fd5 100644 --- a/board/mx1ads/mx1ads.c +++ b/board/mx1ads/mx1ads.c @@ -85,7 +85,7 @@ int board_init (void) GPCR = 0x000003AB; /* I/O pad driving strength */ - /* MX1_CS1U = 0x00000A00; *//* SRAM initialization */ + /* MX1_CS1U = 0x00000A00; */ /* SRAM initialization */ /* MX1_CS1L = 0x11110601; */ MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */ |