* Patch by Andre Schwarz, 24 Nov 2003:

  add support for mvblue (mvBlueLYNX and mvBlueBOX) boards

* Patch by Pavel Bartusek, 21 Nov 2003:
  set ZMII bridge speed on 440

* Patch by Anders Larsen, 17 Nov 2003:
  Fix mismatched #ifdef / #endif in include/asm-arm/arch-pxa/hardware.h

5 files changed, 1036 insertions, 0 deletions

diff --git a/board/mvblue/Makefile b/board/mvblue/Makefile
new file mode 100644
index 0000000..24dc026
--- /dev/null
+++ b/board/mvblue/Makefile
@@ -0,0 +1,41 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+SOBJS	=
+
+$(LIB):	.depend $(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/mvblue/config.mk b/board/mvblue/config.mk
new file mode 100644
index 0000000..6e0ce4e
--- /dev/null
+++ b/board/mvblue/config.mk
@@ -0,0 +1,26 @@
+#
+# (C) Copyright 2001-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xFFF00000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/mvblue/flash.c b/board/mvblue/flash.c
new file mode 100644
index 0000000..8df573a
--- /dev/null
+++ b/board/mvblue/flash.c
@@ -0,0 +1,583 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * (C) Copyright 2001-2003
+ *
+ * Changes for MATRIX Vision mvBLUE devices
+ * MATRIX Vision GmbH / hg,as info@matrix-vision.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+
+#if 0
+	#define mvdebug(p) printf ##p
+#else
+	#define mvdebug(p)
+#endif
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS];
+
+#define FLASH_BUS_WIDTH		8
+
+#if (FLASH_BUS_WIDTH==32)
+	#define FLASH_DATA_MASK 0xffffffff
+	#define FLASH_SHIFT 1
+	#define FDT	vu_long
+#elif (FLASH_BUS_WIDTH==16)
+	#define FLASH_DATA_MASK 0xff
+	#define FLASH_SHIFT 0
+	#define FDT	vu_short
+#elif (FLASH_BUS_WIDTH==8)
+	#define FLASH_DATA_MASK 0xff
+	#define FLASH_SHIFT 0
+	#define FDT	vu_char
+#else
+	#error FLASH_BUS_WIDTH undefined
+#endif
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long *address, flash_info_t *info);
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+
+/*-----------------------------------------------------------------------
+ */
+unsigned long flash_init (void)
+{
+	unsigned long size_b0;
+	int i;
+
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	size_b0 = flash_get_size((vu_long *)0xffc00000, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH : Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+	flash_get_offsets (0xffc00000, &flash_info[0]);
+	flash_info[0].size = size_b0;
+
+	/* monitor protection OFF by default */
+	flash_protect ( FLAG_PROTECT_CLEAR, 0xffc00000, 0x2000, flash_info );
+
+	return size_b0;
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	/* set up sector start address table */
+	if (info->flash_id & FLASH_BTYPE)
+	{	/* bottom boot sector types - these are the useful ones! */
+		/* set sector offsets for bottom boot block type */
+		if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B)
+		{	/* AMDLV320B has 8 x 8k bottom boot sectors */
+			for (i = 0; i < 8; i++)												/* +8k		*/
+				info->start[i] = base + (i * (0x00002000 << FLASH_SHIFT));
+			for (; i < info->sector_count; i++)									/* +64k		*/
+				info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT)) - (0x00070000 << FLASH_SHIFT);
+		}
+		else
+		{	/* other types have 4 bottom boot sectors (16,8,8,32) */
+			i = 0;
+			info->start[i++] = base +  0x00000000;								/* -		*/
+			info->start[i++] = base + (0x00004000 << FLASH_SHIFT);				/* +16k		*/
+			info->start[i++] = base + (0x00006000 << FLASH_SHIFT);				/* +8k		*/
+			info->start[i++] = base + (0x00008000 << FLASH_SHIFT);				/* +8k		*/
+			info->start[i++] = base + (0x00010000 << FLASH_SHIFT);				/* +32k		*/
+			for (; i < info->sector_count; i++)									/* +64k		*/
+				info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT)) - (0x00030000 << FLASH_SHIFT);
+		}
+	}
+	else
+	{	/* top boot sector types - not so useful */
+		/* set sector offsets for top boot block type */
+		if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T)
+		{	/* AMDLV320T has 8 x 8k top boot sectors */
+			for (i = 0; i < info->sector_count - 8; i++)						/* +64k		*/
+				info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT));
+			for (; i < info->sector_count; i++)									/* +8k		*/
+				info->start[i] = base + (i * (0x00002000 << FLASH_SHIFT));
+		}
+		else
+		{	/* other types have 4 top boot sectors (32,8,8,16) */
+			for (i = 0; i < info->sector_count - 4; i++)						/* +64k		*/
+				info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT));
+
+			info->start[i++] = base + info->size - (0x00010000 << FLASH_SHIFT);	/* -32k		*/
+			info->start[i++] = base + info->size - (0x00008000 << FLASH_SHIFT);	/* -8k		*/
+			info->start[i++] = base + info->size - (0x00006000 << FLASH_SHIFT);	/* -8k		*/
+			info->start[i]   = base + info->size - (0x00004000 << FLASH_SHIFT);	/* -16k		*/
+		}
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");	break;
+	case FLASH_MAN_STM:	printf ("ST ");			break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM320B:	printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM320T:	printf ("AM29LV320T (32 Mbit, top boot sector)\n");
+				break;
+	case FLASH_STMW320DB:	printf ("M29W320B (32 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_STMW320DT:	printf ("M29W320T (32 Mbit, top boot sector)\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : "     ");
+	}
+	printf ("\n");
+}
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+#define	AMD_ID_LV160T_MVS	(AMD_ID_LV160T & FLASH_DATA_MASK)
+#define AMD_ID_LV160B_MVS	(AMD_ID_LV160B & FLASH_DATA_MASK)
+#define AMD_ID_LV320T_MVS	(AMD_ID_LV320T & FLASH_DATA_MASK)
+#define AMD_ID_LV320B_MVS	(AMD_ID_LV320B & FLASH_DATA_MASK)
+#define STM_ID_W320DT_MVS	(STM_ID_29W320DT & FLASH_DATA_MASK)
+#define STM_ID_W320DB_MVS	(STM_ID_29W320DB & FLASH_DATA_MASK)
+#define AMD_MANUFACT_MVS	(AMD_MANUFACT  & FLASH_DATA_MASK)
+#define FUJ_MANUFACT_MVS	(FUJ_MANUFACT  & FLASH_DATA_MASK)
+#define STM_MANUFACT_MVS	(STM_MANUFACT  & FLASH_DATA_MASK)
+
+#if (FLASH_BUS_WIDTH >= 16)
+	#define AUTOSELECT_ADDR1	0x0555
+	#define AUTOSELECT_ADDR2	0x02AA
+	#define AUTOSELECT_ADDR3	AUTOSELECT_ADDR1
+#else
+	#define AUTOSELECT_ADDR1	0x0AAA
+	#define AUTOSELECT_ADDR2	0x0555
+	#define AUTOSELECT_ADDR3	AUTOSELECT_ADDR1
+#endif
+
+#define AUTOSELECT_DATA1	(0x00AA00AA & FLASH_DATA_MASK)
+#define AUTOSELECT_DATA2	(0x00550055 & FLASH_DATA_MASK)
+#define AUTOSELECT_DATA3	(0x00900090 & FLASH_DATA_MASK)
+
+#define RESET_BANK_DATA		(0x00F000F0 & FLASH_DATA_MASK)
+
+
+static ulong flash_get_size (vu_long *address, flash_info_t *info)
+{
+	short i;
+	FDT value;
+	FDT *addr = (FDT *)address;
+
+	ulong base = (ulong)address;
+	addr[AUTOSELECT_ADDR1] = AUTOSELECT_DATA1;
+	addr[AUTOSELECT_ADDR2] = AUTOSELECT_DATA2;
+	addr[AUTOSELECT_ADDR3] = AUTOSELECT_DATA3;
+	__asm__ __volatile__("sync");
+
+	udelay(180);
+
+	value = addr[0];			/* manufacturer ID	*/
+	switch (value) {
+	case AMD_MANUFACT_MVS:
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+	case FUJ_MANUFACT_MVS:
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	case STM_MANUFACT_MVS:
+		info->flash_id = FLASH_MAN_STM;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* no or unknown flash	*/
+	}
+#if (FLASH_BUS_WIDTH >= 16)
+	value = addr[1];			/* device ID		*/
+#else
+	value = addr[2];			/* device ID		*/
+#endif
+
+	switch (value) {
+	case AMD_ID_LV160T_MVS:
+		info->flash_id += FLASH_AM160T;
+		info->sector_count = 37;
+		info->size = (0x00200000 << FLASH_SHIFT);
+		break;				/* => 2 or 4 MB		*/
+
+	case AMD_ID_LV160B_MVS:
+		info->flash_id += FLASH_AM160B;
+		info->sector_count = 37;
+		info->size = (0x00200000 << FLASH_SHIFT);
+		break;				/* => 2 or 4 MB		*/
+
+	case AMD_ID_LV320T_MVS:
+		info->flash_id += FLASH_AM320T;
+		info->sector_count = 71;
+		info->size = (0x00400000 << FLASH_SHIFT);
+		break;				/* => 4 or 8 MB		*/
+
+	case AMD_ID_LV320B_MVS:
+		info->flash_id += FLASH_AM320B;
+		info->sector_count = 71;
+		info->size = (0x00400000 << FLASH_SHIFT);
+		break;				/* => 4 or 8MB		*/
+
+	case STM_ID_W320DT_MVS:
+		info->flash_id += FLASH_STMW320DT;
+		info->sector_count = 67;
+		info->size = (0x00400000 << FLASH_SHIFT);
+		break;				/* => 4 or 8 MB		*/
+
+	case STM_ID_W320DB_MVS:
+		info->flash_id += FLASH_STMW320DB;
+		info->sector_count = 67;
+		info->size = (0x00400000 << FLASH_SHIFT);
+		break;				/* => 4 or 8MB		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		return (0);			/* => no or unknown flash */
+
+	}
+
+	/* set up sector start address table */
+	flash_get_offsets (base, info);
+
+	/* check for protected sectors */
+	for (i = 0; i < info->sector_count; i++) {
+		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
+		/* D0 = 1 if protected */
+		addr = (FDT *)(info->start[i]);
+		info->protect[i] = addr[2] & 1;
+	}
+
+	/*
+	 * Prevent writes to uninitialized FLASH.
+	 */
+	if (info->flash_id != FLASH_UNKNOWN) {
+		addr = (FDT *)info->start[0];
+		*addr = RESET_BANK_DATA;	/* reset bank */
+	}
+	return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+#if (FLASH_BUS_WIDTH >= 16)
+	#define ERASE_ADDR1 0x0555
+	#define ERASE_ADDR2 0x02AA
+#else
+	#define ERASE_ADDR1 0x0AAA
+	#define ERASE_ADDR2 0x0555
+#endif
+
+#define ERASE_ADDR3 ERASE_ADDR1
+#define ERASE_ADDR4 ERASE_ADDR1
+#define ERASE_ADDR5 ERASE_ADDR2
+
+#define ERASE_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
+#define ERASE_DATA2 (0x00550055 & FLASH_DATA_MASK)
+#define ERASE_DATA3 (0x00800080 & FLASH_DATA_MASK)
+#define ERASE_DATA4 ERASE_DATA1
+#define ERASE_DATA5 ERASE_DATA2
+
+#define ERASE_SECTOR_DATA 	(0x00300030 & FLASH_DATA_MASK)
+#define ERASE_CHIP_DATA 	(0x00100010 & FLASH_DATA_MASK)
+#define ERASE_CONFIRM_DATA 	(0x00800080 & FLASH_DATA_MASK)
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	FDT *addr = (FDT *)(info->start[0]);
+
+	int prot, sect, l_sect, flag;
+	ulong start, now, last;
+
+	__asm__ __volatile__ ("sync");
+	addr[0] = 0xf0;
+	udelay(1000);
+
+	printf("\nflash_erase: first = %d @ 0x%08lx\n", s_first, info->start[s_first] );
+	printf("             last  = %d @ 0x%08lx\n", s_last , info->start[s_last ] );
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if ((info->flash_id == FLASH_UNKNOWN) || (info->flash_id > FLASH_AMD_COMP)) {
+		printf ("Can't erase unknown flash type %08lx - aborted\n", info->flash_id);
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	l_sect = -1;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	addr[ERASE_ADDR1] = ERASE_DATA1;
+	addr[ERASE_ADDR2] = ERASE_DATA2;
+	addr[ERASE_ADDR3] = ERASE_DATA3;
+	addr[ERASE_ADDR4] = ERASE_DATA4;
+	addr[ERASE_ADDR5] = ERASE_DATA5;
+
+	for (sect = s_first; sect <= s_last; sect++) {
+		if (info->protect[sect] == 0) {
+			addr = (FDT *)(info->start[sect]);
+			addr[0] = ERASE_SECTOR_DATA;
+			l_sect = sect;
+		}
+	}
+
+	if (flag)
+		enable_interrupts();
+
+	/*
+	 * We wait for the last triggered sector
+	 */
+	if (l_sect < 0)
+		goto DONE;
+
+	start = get_timer (0);
+	last  = start;
+	addr = (FDT *)(info->start[l_sect]);
+
+	while ((addr[0] & ERASE_CONFIRM_DATA) != ERASE_CONFIRM_DATA) {
+		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+			printf ("Timeout\n");
+			return 1;
+		}
+		/* show that we're waiting */
+		if ((now - last) > 1000) {	/* every second */
+			putc ('.');
+			last = now;
+		}
+	}
+
+DONE:
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+#define BUFF_INC 4
+	ulong cp, wp, data;
+	int i, l, rc;
+
+	mvdebug (("+write_buff %p ==> 0x%08lx, count = 0x%08lx\n", src, addr, cnt));
+
+	wp = (addr & ~3);	/* get lower word aligned address */
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		mvdebug ((" handle unaligned start bytes (cnt = 0x%08lx)\n", cnt));
+		data = 0;
+		for (i=0, cp=wp; i<l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+		for (; i<BUFF_INC && cnt>0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt==0 && i<BUFF_INC; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += BUFF_INC;
+	}
+
+	/*
+	 * handle (half)word aligned part
+	 */
+	mvdebug ((" handle word aligned part (cnt = 0x%08lx)\n", cnt));
+	while (cnt >= BUFF_INC) {
+		data = 0;
+		for (i=0; i<BUFF_INC; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += BUFF_INC;
+		cnt -= BUFF_INC;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	mvdebug ((" handle unaligned tail bytes (cnt = 0x%08lx)\n", cnt));
+	data = 0;
+	for (i=0, cp=wp; i<BUFF_INC && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<BUFF_INC; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_word(info, wp, data));
+}
+
+#if (FLASH_BUS_WIDTH >= 16)
+	#define WRITE_ADDR1 0x0555
+	#define WRITE_ADDR2 0x02AA
+#else
+	#define WRITE_ADDR1 0x0AAA
+	#define WRITE_ADDR2 0x0555
+	#define WRITE_ADDR3 WRITE_ADDR1
+#endif
+
+#define WRITE_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
+#define WRITE_DATA2 (0x00550055 & FLASH_DATA_MASK)
+#define WRITE_DATA3 (0x00A000A0 & FLASH_DATA_MASK)
+
+#define WRITE_CONFIRM_DATA ERASE_CONFIRM_DATA
+
+/*-----------------------------------------------------------------------
+ * Write a byte to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_char (flash_info_t *info, ulong dest, uchar data)
+{
+	vu_char *addr = (vu_char *)(info->start[0]);
+	ulong start;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((vu_char *)dest) & data) != data) {
+		printf(" *** ERROR: Flash not erased !\n");
+		return (2);
+	}
+	flag = disable_interrupts();
+
+	addr[WRITE_ADDR1] = WRITE_DATA1;
+	addr[WRITE_ADDR2] = WRITE_DATA2;
+	addr[WRITE_ADDR3] = WRITE_DATA3;
+	*((vu_char *)dest) = data;
+
+	if (flag)
+		enable_interrupts();
+
+	/* data polling for D7 */
+	start = get_timer (0);
+	addr = (vu_char *)dest;
+	while (( (*addr) & WRITE_CONFIRM_DATA) != (data & WRITE_CONFIRM_DATA)) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			printf(" *** ERROR: Flash write timeout !");
+			return (1);
+		}
+	}
+ 	mvdebug (("-write_byte\n"));
+	return (0);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data)
+{
+	int i,
+		result = 0;
+
+	mvdebug (("+write_word : 0x%08lx @ 0x%08lx\n", data, dest));
+	for ( i=0; (i < 4) && (result == 0); i++, dest+=1 )
+		result = write_char (info, dest, (data >> (8*(3-i))) & 0xff );
+ 	mvdebug (("-write_word\n"));
+	return result;
+}
+/*---------------------------------------------------------------- */
diff --git a/board/mvblue/mvblue.c b/board/mvblue/mvblue.c
new file mode 100644
index 0000000..6827a23
--- /dev/null
+++ b/board/mvblue/mvblue.c
@@ -0,0 +1,253 @@
+/*
+ * GNU General Public License for more details.
+ *
+ * MATRIX Vision GmbH / June 2002-Nov 2003
+ * Andre Schwarz
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <asm/io.h>
+#include <ns16550.h>
+
+#ifdef CONFIG_PCI
+	#include <pci.h>
+#endif
+
+u32 get_BoardType(void);
+
+#define PCI_CONFIG(b,d,f,r)    cpu_to_le32(0x80000000 | ((b&0xff)<<16) \
+                                                      | ((d&0x1f)<<11) \
+                                                      | ((f&0x7)<<7)   \
+                                                      | (r&0xfc) )
+
+int mv_pci_read( int bus, int dev, int func, int reg )
+{
+    *(u32*)(0xfec00cf8) = PCI_CONFIG(bus,dev,func,reg);
+    asm("sync");
+    return cpu_to_le32( *(u32*)(0xfee00cfc) );
+}
+u32 get_BoardType() {
+	return ( mv_pci_read(0,0xe,0,0) == 0x06801095 ? 0 : 1 );
+}
+
+void init_2nd_DUART(void)
+{
+	NS16550_t console = (NS16550_t)CFG_NS16550_COM2;
+	int clock_divisor = CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE;
+	*(u8*)(0xfc004511) = 0x1;
+	NS16550_init(console, clock_divisor);
+}
+void hw_watchdog_reset(void)
+{
+	if (get_BoardType() == 0 ) {
+    	*(u32*)(0xff000005) = 0;
+    	asm("sync");
+	}
+}
+int checkboard (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	ulong busfreq  = get_bus_freq(0);
+	char  buf[32];
+	u32   BoardType = get_BoardType();
+	char *BoardName[2] = { "mvBlueBOX", "mvBlueLYNX" };
+	char *p;
+	bd_t *bd = gd->bd;
+
+	hw_watchdog_reset();
+
+	printf("U-Boot (%s) running on mvBLUE device.\n", MV_VERSION);
+	printf("       Found %s running at %s MHz memory clock.\n", BoardName[BoardType], strmhz(buf, busfreq) );
+
+	init_2nd_DUART();
+
+    if ( (p = getenv("console_nr")) != NULL ) {
+        unsigned long con_nr = simple_strtoul( p, NULL, 10) & 3;
+        bd->bi_baudrate &= ~3;
+        bd->bi_baudrate |= con_nr & 3;
+	}
+	return 0;
+}
+
+long int initdram (int board_type)
+{
+	int              i, cnt;
+	volatile uchar * base= CFG_SDRAM_BASE;
+	volatile ulong * addr;
+	ulong            save[32];
+	ulong            val, ret  = 0;
+
+	for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
+		addr = (volatile ulong *)base + cnt;
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
+
+	addr = (volatile ulong *)base;
+	save[i] = *addr;
+	*addr = 0;
+
+	if (*addr != 0) {
+		*addr = save[i];
+		goto Done;
+	}
+
+	for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
+		addr = (volatile ulong *)base + cnt;
+		val = *addr;
+		*addr = save[--i];
+		if (val != ~cnt) {
+			ulong new_bank0_end = cnt * sizeof(long) - 1;
+			ulong mear1  = mpc824x_mpc107_getreg(MEAR1);
+			ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
+			mear1 =  (mear1  & 0xFFFFFF00) |
+			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+			emear1 = (emear1 & 0xFFFFFF00) |
+			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+			mpc824x_mpc107_setreg(MEAR1,  mear1);
+			mpc824x_mpc107_setreg(EMEAR1, emear1);
+			ret = cnt * sizeof(long);
+			goto Done;
+		}
+	}
+
+	ret = CFG_MAX_RAM_SIZE;
+Done:
+	return ret;
+}
+
+/* ------------------------------------------------------------------------- */
+u8 *dhcp_vendorex_prep(u8 *e)
+{
+char *ptr;
+
+	/* DHCP vendor-class-identifier = 60 */
+    if ((ptr = getenv("dhcp_vendor-class-identifier"))) {
+        *e++ = 60;
+        *e++ = strlen(ptr);
+        while (*ptr)
+            *e++ = *ptr++;
+    }
+	/* my DHCP_CLIENT_IDENTIFIER = 61 */
+    if ((ptr = getenv("dhcp_client_id"))) {
+        *e++ = 61;
+        *e++ = strlen(ptr);
+        while (*ptr)
+            *e++ = *ptr++;
+    }
+    return e;
+}
+u8 *dhcp_vendorex_proc(u8 *popt)
+{
+    return NULL;
+}
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Initialize PCI Devices
+ */
+#ifdef CONFIG_PCI
+void pci_mvblue_clear_base( struct pci_controller *hose, pci_dev_t dev )
+{
+	u32 cnt;
+	printf("clear base @ dev/func 0x%02x/0x%02x ... ", PCI_DEV(dev), PCI_FUNC(dev) );
+    for( cnt = 0; cnt < 6; cnt++ )
+    	pci_hose_write_config_dword( hose, dev, 0x10 + (4*cnt), 0x0 );
+	printf("done\n");
+}
+
+void duart_setup( u32 base, u16 divisor )
+{
+	printf("duart setup ...");
+	out_8( (u8*)( CFG_ISA_IO+base+3), 0x80);
+    out_8( (u8*)( CFG_ISA_IO+base+0), divisor & 0xff);
+    out_8( (u8*)( CFG_ISA_IO+base+1), divisor >> 8 );
+    out_8( (u8*)( CFG_ISA_IO+base+3), 0x03);
+    out_8( (u8*)( CFG_ISA_IO+base+4), 0x03);
+    out_8( (u8*)( CFG_ISA_IO+base+2), 0x07);
+	printf("done\n");
+}
+
+void pci_mvblue_fixup_irq_behind_bridge( struct pci_controller *hose, pci_dev_t bridge, unsigned char irq)
+{
+	pci_dev_t d;
+	unsigned char 	bus;
+	unsigned short 	vendor,
+					class;
+
+	pci_hose_read_config_byte( hose, bridge, PCI_SECONDARY_BUS, &bus );
+	for (d =  PCI_BDF(bus,0,0);
+         d <  PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
+       	 d += PCI_BDF(0,0,1))
+	{
+        pci_hose_read_config_word(hose, d, PCI_VENDOR_ID, &vendor);
+        if (vendor != 0xffff && vendor != 0x0000)
+        {
+			pci_hose_read_config_word( hose, d, PCI_CLASS_DEVICE, &class );
+			if ( class == PCI_CLASS_BRIDGE_PCI )
+				pci_mvblue_fixup_irq_behind_bridge( hose, d, irq );
+			else
+				pci_hose_write_config_byte( hose, d, PCI_INTERRUPT_LINE, irq );
+		}
+	}
+}
+
+#define MV_MAX_PCI_BUSSES	3
+#define SLOT0_IRQ	3
+#define SLOT1_IRQ	4
+void pci_mvblue_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+{
+    unsigned char 	line=0xff;
+	unsigned short 	class;
+
+	if( PCI_BUS(dev) == 0 ) {
+	    switch(PCI_DEV(dev)) {
+	    case 0xd:
+			if ( get_BoardType() == 0 ) {
+				line = 1;
+			} else
+				/* mvBL */
+		        line = 2;
+	        break;
+	    case 0xe:
+			/* mvBB: IDE */
+			line = 2;
+    		pci_hose_write_config_byte(hose, dev, 0x8a, 0x20 );
+			break;
+		case 0xf:
+			/* mvBB: Slot0 (Grabber) */
+			pci_hose_read_config_word( hose, dev, PCI_CLASS_DEVICE, &class );
+			if ( class == PCI_CLASS_BRIDGE_PCI ) {
+				pci_mvblue_fixup_irq_behind_bridge( hose, dev, SLOT0_IRQ );
+				line = 0xff;
+			} else
+				line = SLOT0_IRQ;
+			break;
+		case 0x10:
+			/* mvBB: Slot1 */
+			pci_hose_read_config_word( hose, dev, PCI_CLASS_DEVICE, &class );
+			if ( class == PCI_CLASS_BRIDGE_PCI ) {
+				pci_mvblue_fixup_irq_behind_bridge( hose, dev, SLOT1_IRQ );
+				line = 0xff;
+			} else
+				line = SLOT1_IRQ;
+			break;
+	    default:
+			printf("***pci_scan: illegal dev = 0x%08x\n", PCI_DEV(dev) );
+			line = 0xff;
+			break;
+	    }
+    	pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, line );
+	}
+}
+
+struct pci_controller hose = {
+	fixup_irq: pci_mvblue_fixup_irq
+};
+
+void pci_init_board(void)
+{
+	pci_mpc824x_init(&hose);
+}
+#endif
diff --git a/board/mvblue/u-boot.lds b/board/mvblue/u-boot.lds
new file mode 100644
index 0000000..9d949b5
--- /dev/null
+++ b/board/mvblue/u-boot.lds
@@ -0,0 +1,133 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc824x/start.o		(.text)
+    lib_ppc/board.o		(.text)
+    lib_ppc/ppcstring.o		(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+	. = DEFINED(env_offset) ? env_offset : .;
+    common/environment.o (.text)
+
+	*(.text)
+
+    *(.fixup)
+    *(.got1)
+    . = ALIGN(16);
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+
+  _end = . ;
+  PROVIDE (end = .);
+}