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| author | Wolfgang Denk <wd@denx.de> | 2007-12-27 01:52:50 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-12-27 01:52:50 +0100 |
| commit | 61fb15c516fef5631e305f1976d7b3a679725856 (patch) | |
| tree | 3b3e66c90349f1b5df7c2a05dd47c11f42eb58bd /board/ms7750se | |
| parent | 6e1bbe6e3edf5f508de89114577ce7b7caa89c8a (diff) | |
| download | u-boot-imx-61fb15c516fef5631e305f1976d7b3a679725856.zip u-boot-imx-61fb15c516fef5631e305f1976d7b3a679725856.tar.gz u-boot-imx-61fb15c516fef5631e305f1976d7b3a679725856.tar.bz2 | |
Fix coding style issues; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/ms7750se')
| -rw-r--r-- | board/ms7750se/lowlevel_init.S | 9 | ||||
| -rw-r--r-- | board/ms7750se/ms7750se.c | 2 | ||||
| -rw-r--r-- | board/ms7750se/u-boot.lds | 11 |
3 files changed, 10 insertions, 12 deletions
diff --git a/board/ms7750se/lowlevel_init.S b/board/ms7750se/lowlevel_init.S index 360c9fa..d3e3cd5 100644 --- a/board/ms7750se/lowlevel_init.S +++ b/board/ms7750se/lowlevel_init.S @@ -2,8 +2,8 @@ modified from SH-IPL+g Renesaso SuperH / Solution Enginge MS775xSE01 BSC setting. - Support CPU : SH7750/SH7750S/SH7750R/SH7751/SH7751R - + Support CPU : SH7750/SH7750S/SH7750R/SH7751/SH7751R + Coyright (c) 2007 Nobuhiro Iwamatsu <iwmatsu@nigauri.org> * See file CREDITS for list of people who contributed to this @@ -102,7 +102,7 @@ init_bsc: mov #0,r0 mov.b r0,@r1 - ! Do you need PCMCIA setting? + ! Do you need PCMCIA setting? ! If so, please add the lines here... mov.l RTCNT_A,r1 /* RTCNT Address */ @@ -165,7 +165,7 @@ WCR2_A: .long WCR2 WCR2_D: .long WCR2_D_VALUE /* Per-area access and burst wait states */ WCR3_A: .long WCR3 WCR3_D: .long WCR3_D_VALUE /* Address setup and data hold cycles */ -RTCSR_A: .long RTCSR +RTCSR_A: .long RTCSR RTCSR_D: .long 0xA518 /* RTCSR Write Code A5h Data 18h */ RTCNT_A: .long RTCNT RTCNT_D: .long 0xA500 /* RTCNT Write Code A5h Data 00h */ @@ -177,4 +177,3 @@ MCR_D1: .long MCR_D1_VALUE MCR_D2: .long MCR_D2_VALUE RFCR_A: .long RFCR RFCR_D: .long 0xA400 /* RFCR Write Code A4h Data 00h */ - diff --git a/board/ms7750se/ms7750se.c b/board/ms7750se/ms7750se.c index 1ae9dd1..d2d824c 100644 --- a/board/ms7750se/ms7750se.c +++ b/board/ms7750se/ms7750se.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2007 + * Copyright (C) 2007 * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> * * See file CREDITS for list of people who contributed to this diff --git a/board/ms7750se/u-boot.lds b/board/ms7750se/u-boot.lds index 24c2184..692bc62 100644 --- a/board/ms7750se/u-boot.lds +++ b/board/ms7750se/u-boot.lds @@ -32,19 +32,19 @@ SECTIONS Although size of SDRAM can be either 16 or 32 MBytes, we assume 16 MBytes (ie ignore upper half if the full 32 MBytes is present). - + NOTE: This address must match with the definition of TEXT_BASE in config.mk (in this directory). - + */ . = 0x8C000000 + (64*1024*1024) - (256*1024); - + PROVIDE (reloc_dst = .); PROVIDE (_ftext = .); PROVIDE (_fcode = .); PROVIDE (_start = .); - + .text : { cpu/sh4/start.o (.text) @@ -89,7 +89,7 @@ SECTIONS } PROVIDE (__u_boot_cmd_end = .); - PROVIDE (reloc_dst_end = .); + PROVIDE (reloc_dst_end = .); /* _reloc_dst_end = .; */ PROVIDE (bss_start = .); @@ -103,4 +103,3 @@ SECTIONS PROVIDE (_end = .); } - |